Alternatives and similar repositories for riscv-hobby-os:

Users that are interested in riscv-hobby-os are comparing it to the libraries listed below

• noteed / riscv-hello-asm
  Bare metal RISC-V assembly hello world
  ☆54Updated 3 years ago
• lupyuen / nuttx-star64
  Apache NuttX RTOS for Pine64 Star64 64-bit RISC-V SBC (StarFive JH7110)
  ☆26Updated this week
• riscv-non-isa / riscv-uefi
  ☆29Updated 2 years ago
• ultraembedded / riscv-linux-boot
  Trivial RISC-V Linux binary bootloader
  ☆48Updated 3 years ago
• mausimus / rvcc
  Standalone C compiler for RISC-V and ARM
  ☆80Updated 9 months ago
• riscv-non-isa / riscv-c-api-doc
  Documentation of the RISC-V C API
  ☆75Updated this week
• michaeljclark / busybear-linux
  busybear-linux is a tiny RISC-V Linux root filesystem image that targets the VirtIO board in riscv-qemu.
  ☆99Updated 7 months ago
• twilco / riscv-from-scratch
  The code for the RISC-V from scratch blog post series.
  ☆86Updated 4 years ago
• sifive / meta-sifive
  SiFive OpenEmbedded / Yocto BSP Layer
  ☆52Updated this week
• johnwinans / rvddt
  RISC-V Dynamic Debugging Tool
  ☆46Updated last year
• RobertBaruch / riscv-reboot
  ☆42Updated 4 years ago
• popovicu / linux-no-mmu-userspace-example
  ☆39Updated last year
• riscvarchive / riscv-edk2-platforms
  Port of EDK2 implementation of UEFI to RISC-V. See documentation at:
  ☆18Updated 3 years ago
• sellicott / tcc-riscv32
  Port TCC (Tiny C Compiler) to support Risc-V 32 targets (specifically for the ESP32-C3). This project is a work-in-progress and is not cu…
  ☆64Updated last year
• riscvarchive / riscv-platform-specs
  RISC-V Profiles and Platform Specification
  ☆113Updated last year
• riscv / configuration-structure
  RISC-V Configuration Structure
  ☆37Updated 3 months ago
• lxp32 / lxp32-cpu
  A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set
  ☆60Updated 2 months ago
• starfive-tech / JH7100_Docs
  ☆60Updated 3 years ago
• riscv-non-isa / riscv-brs
  The Boot and Runtime Services (BRS) specification provides the software requirements for system vendors and Operating System Vendors (OSV…
  ☆45Updated this week
• j-core / jcore-cpu
  J-Core J2/J32 5 stage pipeline CPU core
  ☆50Updated 4 years ago
• enthusi / mandelbrot_riscv_assembler
  An example in bare metal RV32 assembly for the longan nano board
  ☆20Updated 3 years ago
• michaelengel / xv6-d1
  Port of MIT's xv6 OS to the Nezha RISC-V board with Allwinner D1 SoC
  ☆104Updated 2 years ago
• michaeljclark / riscv-disassembler
  RISC-V Disassembler with support for RV32/RV64/RV128 IMAFDC
  ☆99Updated 2 years ago
• x653 / xv6-riscv-fpga
  Build a RISC-V computer system on fpga iCE40HX8K-EVB and run UNIX xv6 using only FOSS (free and open source hard- and software).
  ☆43Updated last year
• jevinskie / riscv-smol-linux-kernel
  Patched sources/configs for RISC-V Linux with musl-based toolchain targeting 8 MB RAM
  ☆24Updated 2 years ago
• openhwgroup / corev-gcc
  ☆23Updated 7 months ago
• sifive / freedom-metal
  Bare Metal Compatibility Library for the Freedom Platform
  ☆156Updated last year
• hamsternz / emulate-risc-v
  A very simple RISC-V ISA emulator.
  ☆37Updated 4 years ago
• regymm / buildroot
  buildroot fork from damien -- RV32 no MMU Linux. Run "make qemu_riscv32_nommu_virt_minimal_defconfig" then "make"
  ☆26Updated 9 months ago
• lcq2 / risc-666
  RISC-V user-mode emulator that runs DooM
  ☆50Updated 5 years ago