Alternatives and similar repositories for logisim-simulation:

Users that are interested in logisim-simulation are comparing it to the libraries listed below

• pineapple-one / hardware-eagle
  Hardware design files in Autodesk Eagle
  ☆24Updated 3 years ago
• pineapple-one / hardware-kicad
  ☆18Updated 3 years ago
• sellicott / tcc-riscv32
  Port TCC (Tiny C Compiler) to support Risc-V 32 targets (specifically for the ESP32-C3). This project is a work-in-progress and is not cu…
  ☆65Updated this week
• RobertBaruch / riscv-reboot
  ☆42Updated 4 years ago
• lxp32 / lxp32-cpu
  A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set
  ☆60Updated 3 months ago
• DoctorWkt / CSCv2
  Version 2 of my Crazy Small CPU
  ☆69Updated 6 years ago
• YoWASP / vscode
  YoWASP toolchain for Visual Studio Code
  ☆19Updated 2 months ago
• suarezvictor / litex_imgui_usb_demo
  Soft USB for LiteX
  ☆50Updated 2 years ago
• lawrie / ulx3s_examples
  Example Verilog code for Ulx3s
  ☆40Updated 2 years ago
• Toms42 / logisim-RISC-V-CPU
  ☆20Updated 7 years ago
• rj45 / digilogic
  digilogic is a high speed digital circuit simulator / schematic capture
  ☆26Updated last month
• Johnlon / spam-1
  Home Brew 8 Bit CPU Hardware Implementation including a Verilog simulation, an assembler, a "C" Compiler and this repo also contains my r…
  ☆66Updated last year
• cr1901 / sentinel
  Another size-optimized RISC-V CPU for your consideration.
  ☆58Updated 3 weeks ago
• rob-ng15 / Silice-Playground
  Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice
  ☆35Updated last year
• tommythorn / tinytapeout-4-bit-cpu
  A design for TinyTapeout
  ☆15Updated 2 years ago
• leijurv / Logisim-RISC-V
  ☆38Updated 6 years ago
• x653 / xv6-riscv-fpga
  Build a RISC-V computer system on fpga iCE40HX8K-EVB and run UNIX xv6 using only FOSS (free and open source hard- and software).
  ☆45Updated 2 years ago
• openXC7 / openXC7-snap
  snap package for nextpnr PnR FPGA toolchain for Xilinx 7 series FPGAs, with Spartan7, Artix7, Zynq7 and Kintex7 support
  ☆28Updated 8 months ago
• grughuhler / picorv32_tang_nano_20k
  PicoRV32 RISC-V project for Tang Nano 20K FPGA development board
  ☆24Updated 9 months ago
• f8-arch / doc
  f8 architecture documentation
  ☆17Updated 3 weeks ago
• galacticstudios / KiCadVerilog
  Generate Verilog code from a KiCad netlist
  ☆57Updated 4 months ago
• RadionaOrg / ulx3s-links
  List of all links you can try with ULX3S
  ☆97Updated 3 years ago
• RobertBaruch / mz80
  Formally-verified Z80 core written using nMigen
  ☆11Updated 5 years ago
• krakenlake / vmon
  RISC-V machine code monitor
  ☆35Updated last month
• j-core / jcore-cpu
  J-Core J2/J32 5 stage pipeline CPU core
  ☆51Updated 4 years ago
• JulianKemmerer / PipelineC-Graphics
  Graphics demos
  ☆105Updated last year
• Chalandi / Blinky_Pico2_dual_core_nosdk
  Bare-metal programming on RP2350 dual-core ARM Cortex-m33/RISC-V Hazard3 (non-SDK)
  ☆13Updated 5 months ago
• gregdavill / CH32V003-makefile-example
  CH32V003 is an ultra-cheap RISC-V MCU with 2KB SRAM, 16KB flash, and up to 18 GPIOs
  ☆16Updated 2 years ago
• jevinskie / riscv-smol-linux-kernel
  Patched sources/configs for RISC-V Linux with musl-based toolchain targeting 8 MB RAM
  ☆24Updated 2 years ago
• abnoname / iceZ0mb1e
  FPGA 8-Bit TV80 SoC for Lattice iCE40 with complete open-source toolchain flow using yosys and SDCC
  ☆57Updated 2 years ago