Alternatives and similar repositories for riscv-landscape

Users that are interested in riscv-landscape are comparing it to the libraries listed below

• riscv-non-isa / riscv-semihosting
  ☆30Updated 3 weeks ago
• riscv-non-isa / riscv-uefi
  ☆29Updated 3 years ago
• chipsalliance / rocket-chip-blocks
  RTL blocks compatible with the Rocket Chip Generator
  ☆16Updated 2 months ago
• riscv-non-isa / riscv-brs
  The Boot and Runtime Services (BRS) specification provides the software requirements for system vendors and Operating System Vendors (OSV…
  ☆49Updated 3 weeks ago
• riscv / configuration-structure
  RISC-V Configuration Structure
  ☆38Updated 7 months ago
• riscv-non-isa / riscv-external-debug-security
  The RISC-V External Debug Security Specification
  ☆19Updated last week
• openhwgroup / cv32e40x-dv
  CV32E40X Design-Verification environment
  ☆12Updated last year
• riscvarchive / riscv-zicond
  The ISA specification for the ZiCondOps extension.
  ☆19Updated last year
• riscvarchive / riscv-edk2-platforms
  Port of EDK2 implementation of UEFI to RISC-V. See documentation at:
  ☆18Updated 3 years ago
• riscv / docs-resources
  ☆35Updated 3 weeks ago
• embecosm / riscv-gdbserver
  GDB Server for interacting with RISC-V models, boards and FPGAs
  ☆20Updated 5 years ago
• riscv / riscv-smmtt
  This specification will define the RISC-V privilege ISA extensions required to support Supervisor Domain isolation for multi-tenant secur…
  ☆52Updated last week
• openhwgroup / corev-gcc
  ☆24Updated 10 months ago
• riscv / riscv-smbios
  RISC-V SMBIOS Type 44 Spec
  ☆12Updated last year
• openhwgroup / core-v-sw
  Main Repo for the OpenHW Group Software Task Group
  ☆17Updated 2 months ago
• bluespec / RISCV_gdbstub
  A gdbstub for connecting GDB to a RISC-V Debug Module
  ☆30Updated 7 months ago
• riscv-non-isa / riscv-server-platform
  The RISC-V Server Platform specification defines a standardized set of hardware and sofware capabilities, that portable system software, …
  ☆15Updated last month
• openhwgroup / corev-llvm-project
  ☆14Updated 10 months ago
• uec-hanken / tee-hardware
  TEE hardware - based on the chipyard repository - hardware to accelerate TEE
  ☆24Updated 2 years ago
• embench / embench-rt
  Benchmark suite for real-time behavior, including interrupt latency and context switching times
  ☆15Updated 3 years ago
• sophgocommunity / SG2042-Newsletter
  Weekly update for SG2042 ecosystem. RISC-V is inevitable!
  ☆22Updated this week
• atrosinenko / memtest86-plus-riscv
  Port of original MemTest86+ v5.1 to other architectures (RISC-V for now)
  ☆16Updated 5 years ago
• lowRISC / sonata-system
  A full micro-controller system utilizing the CHERIoT Ibex core, part of the Sunburst project funded by UKRI
  ☆41Updated this week
• stnolting / neorv32-riscof
  ✔️ Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.
  ☆34Updated this week
• OpenPOWERFoundation / openpower
  OpenPOWER Foundation General Information & Repository Listing
  ☆21Updated 3 years ago
• kvm-riscv / howto
  KVM RISC-V HowTOs
  ☆47Updated 2 years ago
• riscv-non-isa / server-soc
  The repo holds the draft non-ISA Server SoC specification being developed by the Server SoC specification TG and to release intermediate …
  ☆24Updated 3 weeks ago
• regymm / buildroot
  buildroot fork from damien -- RV32 no MMU Linux. Run "make qemu_riscv32_nommu_virt_minimal_defconfig" then "make"
  ☆27Updated last year
• XUANTIE-RV / xuantie-yocto
  Yocto project for Xuantie RISC-V CPU
  ☆38Updated 2 weeks ago
• openhwgroup / cv32e41p
  4 stage, in-order, secure RISC-V core based on the CV32E40P with Zfinx and Zce ISA extentions
  ☆27Updated last year