proteus-core / prospectLinks
ProSpeCT: Provably Secure Speculation for the Constant-Time Policy.
☆19Updated 4 months ago
Alternatives and similar repositories for prospect
Users that are interested in prospect are comparing it to the libraries listed below
Sorting:
- Group administration repository for Tech: IOPMP Task Group☆13Updated last year
- This repo holds the work area and revisions of the non-ISA specification created by the RISC-V AP-TEE TG. This specification defines the …☆65Updated 3 weeks ago
- The MIT Sanctum processor top-level project☆31Updated 5 years ago
- Risc-V hypervisor for TEE development☆126Updated 7 months ago
- ☆23Updated 2 years ago
- Data oblivious ISA prototyped on the RISC-V BOOM processor.☆23Updated 3 years ago
- Artifacts for our ShowTime paper (AsiaCCS '23), including distinguishing cache hits and misses with the human eye.☆14Updated 2 years ago
- A rust implementation for DMTF SPDM protocol to support Confidential Computing☆49Updated 3 weeks ago
- Proof of concepts for speculative attacks using the BOOM core (https://github.com/riscv-boom/riscv-boom)☆68Updated 6 years ago
- RISC-V Security HC admin repo☆18Updated last year
- An on-device confidential computing platform☆133Updated 3 weeks ago
- Minimal RISC Extensions for Isolated Execution☆54Updated 6 years ago
- Proof-of-concept implementation for the paper "A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs" (IEEE S&P 2023)☆76Updated 2 months ago
- ☆28Updated 10 months ago
- Microscope: Enabling Microarchitectural Replay Attacks☆20Updated 5 years ago
- Microarchitectural attack development frameworks for prototyping attacks in native code (C, C++, ASM) and in the browser☆62Updated 3 years ago
- Demo host and enclave applications exercising most functionality.☆32Updated 2 years ago
- MultiZone® Security TEE is the quick and safe way to add security and separation to any RISC-V processors. The RISC-V standard ISA doesn'…☆87Updated last year
- ☆119Updated 3 years ago
- The repo contains the SPMP architectural specification, which includes capabilities like access control of read/write/execute requests by…☆21Updated last month
- MIRAGE (USENIX Security 2021)☆14Updated 2 years ago
- RISC-V Security Model☆34Updated 2 weeks ago
- This repo tracks a compatible state of all sev step components and contains script to easily install everything required to setup a sev v…☆44Updated last year
- This specification will define the RISC-V privilege ISA extensions required to support Supervisor Domain isolation for multi-tenant secur…☆64Updated 2 weeks ago
- Reference implementation of Arm-CCA RMM specification☆68Updated 3 weeks ago
- ☆38Updated 3 years ago
- ☆34Updated last month
- Artifacts for Cascade: CPU Fuzzing via Intricate Program Generation (USENIX Security 2024)☆138Updated last year
- A port of the RIPE suite to RISC-V.☆29Updated 7 years ago
- Protecting Accelerator Execution with Arm Confidential Computing Architecture (USENIX Security 2024)☆26Updated 2 years ago