chuliang007 / resnet20_trainingLinks
☆10Updated last year
Alternatives and similar repositories for resnet20_training
Users that are interested in resnet20_training are comparing it to the libraries listed below
Sorting:
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆93Updated 4 years ago
- ☆11Updated 6 years ago
- bitfusion verilog implementation☆12Updated 3 years ago
- Open-source of MSD framework☆16Updated 2 years ago
- A collection of tutorials for the fpgaConvNet framework.☆45Updated last year
- Quantized Training for Convolutional Neural Networks using Xilinx Brevitas☆12Updated 3 years ago
- ☆44Updated 2 years ago
- You can run it on pynq z1. The repository contains the relevant Verilog code, Vivado configuration and C code for sdk testing. The size o…☆194Updated last year
- An FPGA Accelerator for Transformer Inference☆91Updated 3 years ago
- FPGA implement of 8x8 weight stationary systolic array DNN accelerator☆13Updated 4 years ago
- ☆119Updated 5 years ago
- CNN hardware accelerator to accelerate quantized LeNet-5 model☆41Updated 2 years ago
- ☆14Updated 2 years ago
- Deep Learning Accelerator (Convolution Neural Networks)☆194Updated 7 years ago
- C++ code for HLS FPGA implementation of transformer☆18Updated last year
- Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools☆53Updated 7 years ago
- Stochastic Computing for Deep Neural Networks☆33Updated 4 years ago
- FPGA-based hardware accelerator for Vision Transformer (ViT), with Hybrid-Grained Pipeline.☆97Updated 8 months ago
- ☆14Updated 3 years ago
- Model LLM inference on single-core dataflow accelerators☆15Updated last month
- An HLS based winograd systolic CNN accelerator☆54Updated 4 years ago
- Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ☆59Updated 3 years ago
- Sparse CNN Accelerator targeting Intel FPGA☆12Updated 4 years ago
- [TCAD'23] AccelTran: A Sparsity-Aware Accelerator for Transformers☆51Updated last year
- Collection of kernel accelerators optimised for LLM execution☆24Updated last week
- verilog实现TPU中的脉动阵列计算卷积的module☆134Updated 5 months ago
- ☆18Updated last year
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆38Updated 6 years ago
- A DNN Accelerator implemented with RTL.☆67Updated 9 months ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)☆53Updated 4 years ago