jbornschein / soc-lm32Links
Open source/hardware SoC plattform based on the lattice mico 32 softcore
☆15Updated 15 years ago
Alternatives and similar repositories for soc-lm32
Users that are interested in soc-lm32 are comparing it to the libraries listed below
Sorting:
- Xilinx Virtual Cable Daemon☆20Updated 5 years ago
- Open-source CSI-2 receiver for Xilinx UltraScale parts☆37Updated 6 years ago
- Open Source ZYNQ Board☆31Updated 9 years ago
- Reference HDL code for the MATRIX Creator's Spartan 6 FPGA☆28Updated 5 years ago
- Low-cost (or free) programmer for TinyFPGA A-Series boards☆41Updated 3 years ago
- Connecting FPGA and MCU using Ethernet RMII☆23Updated 9 years ago
- iCE40 floorplan viewer☆24Updated 7 years ago
- SD device emulator from ProjectVault☆17Updated 5 years ago
- Small footprint and configurable Inter-Chip communication cores☆60Updated 2 weeks ago
- artix-7 PCIe dev board☆29Updated 7 years ago
- USB 1.1 Device IP Core☆21Updated 7 years ago
- Xilinx 7-series FTDI-FPGA interface through JTAG with 125 us roundtrip latency☆18Updated 6 years ago
- FPGArduino source☆68Updated 6 years ago
- DVI to LVDS Verilog converter☆24Updated 8 years ago
- USB Full-Speed/Hi-Speed Device Controller core for FPGA☆32Updated 4 years ago
- Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores☆51Updated last year
- ChipTools is a utility to automate FPGA build and verification☆24Updated 3 years ago
- verilog core for ws2812 leds☆33Updated 3 years ago
- Implementation of a SDRAM controller in MyHDL (http://www.myhdl.org/)☆21Updated 9 years ago
- vhd2vl is designed to translate synthesizable VHDL into Verilog 2001.☆26Updated 9 years ago
- Altium PCB project for the Titan PCI Express development card. This card uses the Lattice ECP5 FPGA.☆19Updated 10 years ago
- This is a guide for bringing up custom ZYNQ boards. It covers test sequence, test method, common error situations and code and project th…☆69Updated 7 years ago
- This repository contains iCEBreaker examples for Amaranth HDL.☆39Updated last year
- A collection of portable hardware modules☆27Updated 9 years ago
- Verilog implementation of an SPI slave interface. Intially targetted for Atlys devkit (Xilinx Spartan-6) controlled by TotalPhase Cheetah…☆41Updated 6 months ago
- Altera Cyclone IV FPGA project for the PCIe LimeSDR board☆39Updated 2 years ago
- Freecores website☆19Updated 8 years ago
- Simplified environment for litex☆14Updated 4 years ago
- WISHBONE Builder☆14Updated 8 years ago
- Sample minimal Vivado project for Parallella FPGA☆44Updated 9 years ago