Getting started guide for learning and evaluating HDL Coder
☆12Jun 24, 2025Updated last year
Alternatives and similar repositories for HDL-Coder-Evaluation-Reference-Guide
Users that are interested in HDL-Coder-Evaluation-Reference-Guide are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Learn how to deploy an algorithm to an FPGA using MATLAB and Simulink.☆96Feb 9, 2026Updated 8 months ago
- A collection of Opal Kelly provided design resources☆19Jun 15, 2026Updated 4 months ago
- Miscellaneous things and projects for my ZYBO and ZYNQ devices.☆11Aug 30, 2023Updated 3 years ago
- This buildroot fork contains customized recipes for generating AMD-Xilinx SoC and Intel SoC embedded Linux images for use with MathWorks …☆32Nov 17, 2025Updated 11 months ago
- Examples showing how to use SWIG to wrap MATLAB Coder generated C and C++ code for other languages☆11Apr 10, 2023Updated 3 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- ☆13Nov 5, 2024Updated last year
- Synthesizable Higher-Order Functions (Patterns) for C++☆18Oct 3, 2018Updated 8 years ago
- VHDL functional blocks with their simulations and test sequences☆21Oct 19, 2026Updated last week
- eCAL Toolbox for Simulink☆11Feb 16, 2024Updated 2 years ago
- Use MATLAB with Codecov☆11Sep 22, 2026Updated last month
- Continuous Integration with MATLAB on Azure DevOps☆14Oct 20, 2026Updated last week
- 1G eth UDP / IP Stack☆10Jul 17, 2014Updated 12 years ago
- This is forked from Xilinx HLS-Tiny-Tutorial. I'm learning HLS and adding Verilator testbench to verify the generated RTL☆28Oct 4, 2021Updated 5 years ago
- ☆16Oct 5, 2026Updated 3 weeks ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Transfer data over UDP with a Zedboard. This is an example project that transmits and receives data over UDP.☆30Mar 24, 2021Updated 5 years ago
- A DMA Controller for RISCV CPUs☆13Aug 10, 2015Updated 11 years ago
- Multi-function, universal, fixed-point CORDIC☆16Feb 20, 2022Updated 4 years ago
- OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/☆13Jan 26, 2026Updated 9 months ago
- Nengo extension to connect to FPGAs☆18Aug 2, 2026Updated 2 months ago
- GitHub-based statistics highlighting interesting facts about the HDL industry☆12Jul 6, 2023Updated 3 years ago
- Dockerized FPGA toolchains containing openxc7, f4pga, vivado and more☆18Sep 12, 2026Updated last month
- uvm_starter is a simple template for starting uvm projects☆12Feb 11, 2025Updated last year
- clone of szip source☆13Aug 19, 2011Updated 15 years ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- ☆16Sep 14, 2020Updated 6 years ago
- Synchronous use of two LS7366R decoders on Arduino env☆12Sep 9, 2014Updated 12 years ago
- ☆12Mar 1, 2021Updated 5 years ago
- Gstreamer based Edge AI reference application☆14Nov 20, 2023Updated 2 years ago
- Triple Modular Redundancy☆33Sep 4, 2019Updated 7 years ago
- Examples of unions, interfaces, and assertions in SystemVerilog☆14Aug 31, 2013Updated 13 years ago
- Files for the MATLAB & Simulink Racing Lounge code generation tutorials☆20Jul 18, 2023Updated 3 years ago
- This repo consists of the implementation of ADAS algorithms on Arduino, namely, Adaptive Cruise Control and Autonomous Lane Keeping. It a…☆13Sep 29, 2020Updated 6 years ago
- CANopen interface for Arduino SeedStudio CANbus-shield☆15Jun 5, 2015Updated 11 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- evive team and lots of makers contribute to create an opensource pool of ideas and projects. If you want to contribute any projects, plea…☆26Aug 23, 2016Updated 10 years ago
- An implementation of the CCSDS 123.0-B-1 standard for FPGA with parallel capabilities.☆12Jun 1, 2020Updated 6 years ago
- Contains FPGA benchmarks for Vivado HLS and Catapult HLS☆29Jun 18, 2020Updated 6 years ago
- AMD University Program HLS tutorial☆136Oct 28, 2024Updated 2 years ago
- Instructions to import Ubuntu guest Virtual Machine for RISC-V development for the VEGA board☆16Nov 16, 2022Updated 3 years ago
- PolarFire FPGA sample RISC-V designs☆14Oct 15, 2019Updated 7 years ago
- Applications library for Ingenia servo drives☆14Jul 26, 2024Updated 2 years ago