iic-jku / iic-audiodac-v1Links
Delta-sigma audio DAC (16b, 48kHz), intended for tape-out on MPW-5, SKY130 technology.
☆35Updated 3 years ago
Alternatives and similar repositories for iic-audiodac-v1
Users that are interested in iic-audiodac-v1 are comparing it to the libraries listed below
Sorting:
- JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.☆77Updated 9 months ago
- submission repository for efabless mpw6 shuttle☆31Updated 2 years ago
- ☆43Updated 3 years ago
- ☆14Updated 2 years ago
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆36Updated 3 years ago
- VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.☆49Updated 4 years ago
- Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130☆69Updated 3 years ago
- This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…☆78Updated 5 years ago
- XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.☆67Updated last month
- A 10bit SAR ADC in Sky130☆26Updated 3 years ago
- An open-source HDL register code generator fast enough to run in real time.☆81Updated 3 weeks ago
- Skywater 130nm Klayout Device Generators PDK☆30Updated last year
- Python Tool for UVM Testbench Generation☆55Updated last year
- This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…☆46Updated 5 years ago
- PLL Designs on Skywater 130nm MPW☆22Updated 2 years ago
- Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.☆29Updated 3 years ago
- This repo shows an implementation of an FPGA from RTL to GDS with open Skywater-130 pdk☆38Updated 4 years ago
- ☆83Updated 11 months ago
- Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license☆50Updated 9 months ago
- Open Analog Design Environment☆25Updated 2 years ago
- Skywaters 130nm Klayout PDK☆31Updated 11 months ago
- ☆86Updated 3 years ago
- ☆114Updated last month
- 12 bit SAR ADC IP in Skywater 130 nm PDK☆21Updated last year
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆81Updated 4 years ago
- An open source PDK using TIGFET 10nm devices.☆54Updated 3 years ago
- Minimal SKY130 example with self-checking LVS, DRC, and PEX☆24Updated 4 years ago
- Home of the open-source EDA course.☆52Updated 6 months ago
- FOSS-ASIC-TOOLS is all in one container for SKY130 based design both Analog and Digital. Below is a list of the current tools already ins…☆104Updated last year
- This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…☆53Updated 4 years ago