Alternatives and similar repositories for I2S_sender

Users that are interested in I2S_sender are comparing it to the libraries listed below

• DiegoRosales / VHDL_Modules
  VHDL Modules
  ☆24Updated 10 years ago
• kazkojima / pcm2pdm-example
  A tiny example of PCM to PDM pipeline on FPGA
  ☆21Updated 3 years ago
• skristiansson / i2s
  i2s core, with support for both transmit and receive
  ☆30Updated 7 years ago
• Cognoscan / BoostDSP
  VHDL Library for implementing common DSP functionality.
  ☆29Updated 6 years ago
• hamsternz / second_order_sigma_delta_DAC
  A comparison of 1st and 2nd order sigma delta DAC for FPGA
  ☆58Updated 4 years ago
• MatejGomboc / Verilog-I2S-Transciever
  I2S transciever implemented in Verilog HDL
  ☆30Updated 7 years ago
• ultraembedded / core_audio
  Audio controller (I2S, SPDIF, DAC)
  ☆85Updated 5 years ago
• ASP-SoC / ASP-SoC
  Audio Signal Processing SoC
  ☆18Updated 7 years ago
• YetAnotherElectronicsChannel / FPGA-Audio-IIR
  ☆24Updated 5 years ago
• owocomm-0 / fpga-fft
  A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm
  ☆114Updated 4 years ago
• tirfil / VhdI2CSlave
  I2C Slave Interface (Vhdl)
  ☆24Updated 3 years ago
• chili-chips-ba / uberClock
  Digital systems are clocked. This project is about constructing a high-Q clock by simmering an ordinary quartz crystal in a heavy numeric…
  ☆11Updated last week
• rubinsteina13 / SV_I2S_RX_CORE
  Synthesizable SystemVerilog IP-Core of the I2S Receiver
  ☆10Updated 5 years ago
• YetAnotherElectronicsChannel / FPGA-Class-D-Amplifier
  ☆65Updated 5 years ago
• DaveBerkeley / fpga
  Verilog FPGA code : including experimental DSP audio processor
  ☆11Updated 4 years ago
• Digilent / Pmod-I2S2
  ☆45Updated last year
• MauererM / VIIRF
  Hardware description (VHDL) and configuration scripts (Python) of a versatile IIR Filter implemented as cascaded SOS/biquads. No vendor-s…
  ☆20Updated 7 years ago
• pcsrule / zybo-audio
  Realtime audio DSP on the ZyBo
  ☆9Updated 9 years ago
• dawsonjon / FPGA-radio
  Software Defined Radio in FPGA uses LVDS IO pins as 1-bit ADC
  ☆96Updated 8 years ago
• davemuscle / sigma_delta_converters
  Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components
  ☆67Updated 3 years ago
• Digilent / Arty-A7
  ☆15Updated 11 months ago
• noscene / ice40_audio
  verilog example to drive PCM5102 DAC with FPGA
  ☆18Updated 7 years ago
• mattvenn / fpga-sdft
  sliding DFT for FPGA, targetting Lattice ICE40 1k
  ☆77Updated 5 years ago
• amaranth-farm / usb2-highspeed-core
  a USB2 highspeed device core, written in amaranth HDL
  ☆49Updated 9 months ago
• ultraembedded / core_ulpi_wrapper
  ULPI Link Wrapper (USB Phy Interface)
  ☆28Updated 5 years ago
• laura-regan / Digital-Synthesizer
  Digital music synthesizer designed for the Zynq FPGA+SoC. Audio synthesis and digital signal processing is performed in hardware modules …
  ☆22Updated last year
• emard / flearadio
  Digital FM Radio Receiver for FPGA
  ☆61Updated 9 years ago
• MorrisMA / 1PPS-DPLL
  DPLL for phase-locking to 1PPS signal
  ☆32Updated 8 years ago
• gundy / tiny-synth
  Verilog code for a simple synth module; developed on TinyFPGA BX
  ☆97Updated 5 years ago
• ultraembedded / minispartan6-audio
  miniSpartan6+ (Spartan6) FPGA based MP3 Player
  ☆27Updated 5 years ago