Alternatives and similar repositories for qtrvsim:

Users that are interested in qtrvsim are comparing it to the libraries listed below

• liangkangnan / tinyriscv
  A very simple and easy to understand RISC-V core.
  ☆1,158Updated last year
• linux-kernel-labs-zh / docs-linux-kernel-labs-zh-cn
  Linux 内核实验（Linux kernel labs）中文翻译
  ☆802Updated 8 months ago
• mortbopet / Ripes
  A graphical processor simulator and assembly editor for the RISC-V ISA
  ☆2,700Updated 2 weeks ago
• riscv-software-src / opensbi
  RISC-V Open Source Supervisor Binary Interface
  ☆1,119Updated this week
• riscv-non-isa / riscv-elf-psabi-doc
  A RISC-V ELF psABI Document
  ☆742Updated 3 weeks ago
• cnlohr / mini-rv32ima
  A tiny C header-only risc-v emulator.
  ☆1,756Updated 2 weeks ago
• mnurzia / rv
  32-bit RISC-V CPU in ~800 lines of C89
  ☆613Updated 10 months ago
• OpenXiangShan / NEMU
  ☆258Updated this week
• mikeroyal / RISC-V-Guide
  RISC-V Guide. Learn all about the RISC-V computer architecture along with the Development Tools and Operating Systems to develop on RISC-…
  ☆560Updated last year
• XUANTIE-RV / openc906
  OpenXuantie - OpenC906 Core
  ☆337Updated 7 months ago
• plctlab / writing-your-first-riscv-simulator
  《从零开始的RISC-V模拟器开发》配套的PPT和教学资料
  ☆207Updated 3 years ago
• runninglinuxkernel / riscv_programming_practice
  ☆193Updated last year
• cccriscv / mini-riscv-os
  Build a minimal multi-tasking OS kernel for RISC-V from scratch
  ☆421Updated last year
• LoveLonelyTime / Bergamot
  An exquisite superscalar RV32GC processor.
  ☆149Updated last month
• OpenXiangShan / XiangShan-doc
  Documentation for XiangShan
  ☆402Updated this week
• cnrv / riscv-soc-book
  关于RISC-V你所需要知道的一切
  ☆552Updated last year
• riscv-software-src / riscv-pk
  RISC-V Proxy Kernel
  ☆605Updated 2 weeks ago
• riscv-non-isa / riscv-sbi-doc
  Documentation for the RISC-V Supervisor Binary Interface
  ☆379Updated this week
• sunshaoce / rvcc
  本课程基于Rui的chibicc，@sunshaoce和@ksco将其由原来的X86架构改写为RISC-V 64架构，同时加入了大量的中文注释，并且配有316节对应于每一个commit的课程，帮助读者可以层层推进、逐步深入的学习编译器的构造。
  ☆335Updated last year
• Wren6991 / Hazard3
  3-stage RV32IMACZb* processor with debug
  ☆798Updated last week
• enjoy-digital / litex
  Build your hardware, easily!
  ☆3,161Updated this week
• ESEO-Tech / emulsiV
  A visual simulator for teaching computer architecture using the RISC-V instruction set
  ☆178Updated last year
• JGAguado / Smart_Plant
  The Smart Plant is a board that can be plugged directly on the soil, close to the plant, that allows the measurement of the environment (…
  ☆256Updated 2 months ago
• stnolting / neorv32
  A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent …
  ☆1,677Updated this week
• riscv / riscv-opcodes
  RISC-V Opcodes
  ☆720Updated last week
• lucavallin / barco
  Linux containers from scratch in C.
  ☆1,511Updated 9 months ago
• NJU-ProjectN / nemu
  NJU EMUlator, a full system x86/mips32/riscv32/riscv64 emulator for teaching
  ☆949Updated this week
• SpinalHDL / NaxRiscv
  ☆275Updated last week
• NJU-ProjectN / nvboard
  NJU Virtual Board
  ☆255Updated last month
• verilator / verilator
  Verilator open-source SystemVerilog simulator and lint system
  ☆2,732Updated this week