本课程基于Rui的chibicc,@sunshaoce和@ksco将其由原来的X86架构改写为RISC-V 64架构,同时加入了大量的中文注释,并且配有316节对应于每一个commit的课程,帮助读者可以层层推进、逐步深入的学习编译器的构造。
☆363Jun 3, 2023Updated 2 years ago
Alternatives and similar repositories for rvcc
Users that are interested in rvcc are comparing it to the libraries listed below
Sorting:
- ☆96Apr 22, 2024Updated last year
- Learn how to write a minimal working linker from scratch☆109Apr 24, 2024Updated last year
- A fork of chibicc ported to RISC-V assembly.☆43May 19, 2022Updated 3 years ago
- A simple and fast RISC-V JIT emulator.☆156Aug 21, 2024Updated last year
- 《从头写一个RISC-V OS》课程配套的资源☆1,097Apr 28, 2025Updated 10 months ago
- PLCT实验室的公开演讲,或者决定公开的组内报告☆1,138Sep 3, 2025Updated 6 months ago
- A small C compiler☆10,968Oct 30, 2023Updated 2 years ago
- NJU EMUlator, a full system x86/mips32/riscv32/riscv64 emulator for teaching☆1,091Nov 14, 2025Updated 3 months ago
- 程序语言与编译技术相关资料(持续更新中)☆2,154Nov 12, 2025Updated 3 months ago
- ☆228Aug 28, 2023Updated 2 years ago
- 给NEMU移植Linux Kernel!☆22Jun 1, 2025Updated 9 months ago
- writing c compiler in rust. inspired by https://www.sigbus.info/compilerbook☆13Jul 11, 2021Updated 4 years ago
- LLVM IR入门指南☆1,502Jan 4, 2026Updated 2 months ago
- 软件所PLCT实验室在开源领域的不定期简报☆649Updated this week
- 编译器入门课程的配套教学资料☆663Jun 22, 2023Updated 2 years ago
- Basic chisel difftest environment for RTL design (WIP☆20Mar 8, 2025Updated 11 months ago
- Vivado in GitLab-Runner for GitLab CI/CD☆10Oct 27, 2022Updated 3 years ago
- RISC-V模拟器,相关硬件实现`riscv-isa-sim`以及模拟器pk, bbl的指导手册☆54Apr 11, 2020Updated 5 years ago
- 手撸解释 器教程《Crafting Interpreters》中文翻译☆1,890Nov 19, 2024Updated last year
- Build your own Riscv Emulator in Rust.☆107Jul 25, 2022Updated 3 years ago
- How to make undergraduates or new graduates ready for advanced computer architecture research or modern CPU design☆626Aug 13, 2024Updated last year
- RISC-V Supervisor Binary Interface (RISC-V SBI) library in Rust; runs on M or HS mode; good support for embedded Rust ecosystem. For bina…☆1,250Feb 10, 2026Updated 3 weeks ago
- A super tiny RISC-V emulator that is able to run xv6.☆76Aug 16, 2022Updated 3 years ago
- ☆22Nov 3, 2025Updated 4 months ago
- 《从零开始的RISC-V模拟器开发》配套的PPT和教学资料☆233Sep 10, 2021Updated 4 years ago
- jyy os enhanced☆13Jul 10, 2025Updated 7 months ago
- QEMU platform SBI support implementation, using RustSBI☆152Sep 26, 2025Updated 5 months ago
- 没分支的 rCore-Tutorial☆49Jan 8, 2026Updated last month
- Summary of bugs in Xuantie C9XX core design. include C906/C908/C910/C920☆28Feb 10, 2026Updated 3 weeks ago
- Unofficial guide for ysyx students applying to ShanghaiTech University☆23Feb 25, 2025Updated last year
- We ❤️ Interns!☆719Jan 15, 2026Updated last month
- 快速陷入处理☆39Jan 22, 2026Updated last month
- Low level access to RISCV processors☆22Oct 3, 2022Updated 3 years ago
- 《Learn LLVM 12》的非专业个人翻译☆602Dec 29, 2021Updated 4 years ago
- A 2-Way Super-Scalar OoO RISC-V Core Based on Intel P6 Microarchitecture.☆16Sep 27, 2022Updated 3 years ago
- A RISC-V 32 bits, Out Of Order, single issue with branch prediction CPU, implementing the B, C, M and Zfinx extensions.☆20Apr 7, 2025Updated 10 months ago
- 方舟编译入门技术课程的配套代码☆30Sep 16, 2020Updated 5 years ago
- RISC-V SoC designed by students in UCAS☆1,509Jan 14, 2026Updated last month
- Brainfuck JIT 虚拟机教程☆268Feb 1, 2026Updated last month