zjjzby / GNN-hardware-acceleration-paper
This repo is to collect the state-of-the-art GNN hardware acceleration paper
☆54Updated 3 years ago
Alternatives and similar repositories for GNN-hardware-acceleration-paper:
Users that are interested in GNN-hardware-acceleration-paper are comparing it to the libraries listed below
- ☆33Updated 3 years ago
- ☆25Updated 3 years ago
- [HPCA 2022] GCoD: Graph Convolutional Network Acceleration via Dedicated Algorithm and Accelerator Co-Design☆36Updated 3 years ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆79Updated last year
- A dataflow architecture for universal graph neural network inference via multi-queue streaming.☆71Updated 2 years ago
- ☆66Updated 4 years ago
- A reference implementation of the Mind Mappings Framework.☆29Updated 3 years ago
- Scaling Graph Processing on HBM-enabled FPGAs with Heterogeneous Pipelines☆17Updated 2 years ago
- agile hardware-software co-design☆46Updated 3 years ago
- GNNear: Accelerating Full-Batch Training of Graph NeuralNetworks with Near-Memory Processing☆13Updated 2 years ago
- PIM-DL: Expanding the Applicability of Commodity DRAM-PIMs for Deep Learning via Algorithm-System Co-Optimization☆29Updated last year
- A graph linear algebra overlay☆51Updated last year
- The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow☆36Updated 2 years ago
- EQueue Dialect☆40Updated 3 years ago
- [FPGA 2020] Open sourced implementation for the ACM/SIGDA FPGA '20 paper titled "GraphACT: Accelerating GCN Training on CPU-FPGA Heteroge…☆18Updated 4 years ago
- MICRO22 artifact evaluation for Sparseloop☆43Updated 2 years ago
- QuickEst repository: Quick Estimation of Quality of Results☆26Updated 6 years ago
- ☆39Updated 9 months ago
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆53Updated 3 years ago
- Tool for optimize CNN blocking☆94Updated 5 years ago
- ☆16Updated 2 years ago
- Artifact for paper "PIM is All You Need: A CXL-Enabled GPU-Free System for LLM Inference", ASPLOS 2025☆46Updated 3 weeks ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆45Updated 3 years ago
- Serpens is an HBM FPGA accelerator for SpMV☆18Updated 8 months ago
- An end-to-end GCN inference accelerator written in HLS☆19Updated 3 years ago
- ☆8Updated last month
- ☆27Updated 2 years ago
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆52Updated 2 weeks ago
- ☆70Updated 5 years ago
- [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…☆63Updated 2 years ago