Alternatives and similar repositories for bootgen

Users that are interested in bootgen are comparing it to the libraries listed below

• ultraembedded / core_ft60x_axi
  FTDI FT600 SuperSpeed USB3.0 to AXI bus master
  ☆95Updated 5 years ago
• TI-Bonn / vercolib_pcie
  VHDL PCIe Transceiver
  ☆30Updated 5 years ago
• imrickysu / ZYNQ-Custom-Board-Bring-Up-Guide
  This is a guide for bringing up custom ZYNQ boards. It covers test sequence, test method, common error situations and code and project th…
  ☆69Updated 7 years ago
• BerkeleyLab / XVC-FTDI-JTAG
  Xilinx virtual cable server for generic FTDI 4232H.
  ☆59Updated last year
• Digilent / digilent-vivado-scripts
  ☆69Updated last month
• antmicro / zynq-mkbootimage
  An open source replacement of the Xilinx bootgen application.
  ☆111Updated last year
• Xilinx / meta-xilinx-tools
  Yocto Project layer enables AMD Xilinx tools related metadata for MicroBlaze, Zynq, ZynqMP and Versal devices.
  ☆65Updated 3 weeks ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆62Updated 2 years ago
• missinglinkelectronics / fpga-vbs
  Vivado build system
  ☆69Updated 8 months ago
• slaclab / ruckus
  FPGA and Digital ASIC Build System
  ☆76Updated last month
• Avnet / hdl
  ☆113Updated 5 months ago
• hdlguy / make_for_vivado
  experimentation with gnu make for Xilinx Vivado compilation. dependencies can be complicated.
  ☆23Updated last year
• paulscherrerinstitute / psi_common
  Common elements for FPGA Design (FIFOs, RAMs, etc.)
  ☆34Updated 6 months ago
• alexforencich / pin-uart
  FPGA board-level debugging and reverse-engineering tool
  ☆38Updated 2 years ago
• polarfire-soc / polarfire-soc-documentation
  PolarFire SoC Documentation
  ☆57Updated 3 weeks ago
• antmicro / fastvdma
  Antmicro's fast, vendor-neutral DMA IP in Chisel
  ☆123Updated 3 months ago
• fpgadeveloper / ethernet-fmc-axi-eth
  Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks
  ☆66Updated 3 months ago
• enjoy-digital / litejesd204b
  Small footprint and configurable JESD204B core
  ☆45Updated 2 months ago
• Xilinx / Embedded-Design-Tutorials
  ☆141Updated 2 weeks ago
• CospanDesign / nysa-sata
  ☆87Updated 8 years ago
• jacobfeder / axisfifo
  Zynq SoC Linux kernel driver for Xilinx AXI-Stream FIFO IP
  ☆54Updated 6 months ago
• OVGN / OpenHBMC
  Open-source high performance AXI4-based HyperRAM memory controller
  ☆76Updated 2 years ago
• Avnet / petalinux
  Repository used to support automated builds under PetaLinux tools that use Yocto.
  ☆61Updated 4 months ago
• syntacore / scr1-sdk
  open-source SDKs for the SCR1 core
  ☆74Updated 9 months ago
• airhdl / spi-to-axi-bridge
  An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.
  ☆49Updated last year
• SpinalHDL / openocd_riscv
  Spen's Official OpenOCD Mirror
  ☆50Updated 5 months ago
• Xilinx / revCtrl
  Revision Control Labs and Materials
  ☆24Updated 7 years ago
• intel / fpga-partial-reconfig
  Tutorials, scripts and reference designs for the Intel FPGA partial reconfiguration (PR) design flow
  ☆88Updated 5 months ago
• ThalesGroup / TMR
  Triple Modular Redundancy
  ☆27Updated 5 years ago
• robseb / rsyocto
  🤖 SoCFPGA: Open-Source Embedded Linux Distribution with a highly flexible build system, developed for Intel (ALTERA) SoC-FPGAs (Cyclone …
  ☆110Updated 3 years ago