Alternatives and similar repositories for nexys4ddr

Users that are interested in nexys4ddr are comparing it to the libraries listed below

• howerj / forth-cpu
  A Forth CPU and System on a Chip, based on the J1, written in VHDL
  ☆364Updated last year
• pwmarcz / fpga-chip8
  CHIP-8 console on FPGA
  ☆199Updated 6 years ago
• hrvach / fpg1
  FPGA implementation of DEC PDP-1 computer (1959) in Verilog, with CRT, Teletype and Console.
  ☆191Updated 3 years ago
• 1801BM1 / vm80a
  i8080 precise replica in Verilog, based on reverse engineering of real die
  ☆159Updated 6 years ago
• zhemao / ez8
  The Easy 8-bit Processor
  ☆184Updated 11 years ago
• Domipheus / TPU
  TPU, The Test Processing Unit. Or Terrible Processing Unit. A simple 16-bit CPU in VHDL for education as to the dataflow within a CPU. De…
  ☆150Updated 9 years ago
• mrisc32 / mrisc32
  MRSIC32 ISA documentation and development
  ☆91Updated 2 years ago
• zylin / zpu
  The Zylin ZPU
  ☆244Updated 10 years ago
• revaldinho / opc
  One Page CPU Project - CPU, Assembler & Emulator each in a single page of code
  ☆82Updated last year
• AndresNavarro82 / vt52-fpga
  ☆96Updated 4 years ago
• jamesbowman / j1
  The J1 CPU
  ☆172Updated 5 years ago
• howerj / bit-serial
  A bit-serial CPU written in VHDL, with a simulator written in C.
  ☆133Updated last year
• dawsonjon / Chips-2.0
  FPGA Design Suite based on C to Verilog design flow.
  ☆246Updated 6 years ago
• nickmqb / wyre
  Hardware definition language that compiles to Verilog
  ☆106Updated 4 years ago
• stnolting / neo430
  A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.
  ☆205Updated 4 years ago
• alangarf / apple-one
  An attempt at a small Verilog implementation of the original Apple 1 on an FPGA
  ☆150Updated 2 months ago
• mrisc32 / mc1
  A computer (FPGA SoC) based on the MRISC32-A1 CPU
  ☆54Updated 2 years ago
• nullobject / sdram-fpga
  A FPGA core for a simple SDRAM controller.
  ☆123Updated 4 years ago
• fabioperez / space-invaders-vhdl
  Space Invaders game implemented with VHDL
  ☆156Updated 9 years ago
• os-fpga / 1st-CLaaS
  Framework for developing and deploying FPGA logic in the cloud as a microservice for web and cloud applications
  ☆208Updated 2 months ago
• andrescv / jupiter
  RISC-V Assembler and Runtime Simulator
  ☆436Updated last year
• inforichland / freezing-spice
  A pipelined RISCV implementation in VHDL
  ☆97Updated 7 years ago
• Arlet / verilog-6502
  A Verilog HDL model of the MOS 6502 CPU
  ☆358Updated 2 years ago
• jamesbowman / swapforth
  Swapforth is a cross-platform ANS Forth
  ☆295Updated last year
• combinatorylogic / soc
  An experimental System-on-Chip with a custom compiler toolchain.
  ☆60Updated 5 years ago
• RobertBaruch / plugh-1
  A CPU on an FPGA that you can play Zork on
  ☆50Updated 8 years ago
• grahamedgecombe / icicle
  32-bit RISC-V system on chip for iCE40 FPGAs
  ☆310Updated 2 years ago
• tinyvision-ai-inc / UPduino-v3.0
  UPduino 3.0: new 4 layer layout, various other improvements
  ☆345Updated 10 months ago
• jhallen / vivado_setup
  How to set up Xilinx Vivado for source control
  ☆108Updated last year
• Domipheus / RPU
  Basic RISC-V CPU implementation in VHDL.
  ☆171Updated 5 years ago