☆26Aug 25, 2026Updated this week
Alternatives and similar repositories for heliodor
Users that are interested in heliodor are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Filelist generator☆21Aug 11, 2026Updated 2 weeks ago
- TransPimLib is a library for transcendental (and other hard-to-calculate) functions in general-purpose PIM systems, TransPimLib provides …☆15Apr 21, 2023Updated 3 years ago
- ☆22Sep 26, 2025Updated 11 months ago
- Basic Common Modules☆48Jul 16, 2026Updated last month
- Translation of http://chip-architect.com/news/2003_09_21_Detailed_Architecture_of_AMDs_64bit_Core.html☆11Feb 5, 2019Updated 7 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Verylup: the Veryl toolchain installer☆14Aug 10, 2026Updated 2 weeks ago
- tnix (typed-nix) is gradual type system for nix☆31Updated this week
- Let's write RISC-V CPU in Veryl!☆73Jul 24, 2026Updated last month
- In love with Atalanta☆15Feb 28, 2025Updated last year
- Infrastructure to drive Spike (RISC-V ISA Simulator) in cosim mode. Hammer provides a C++ and Python interface to interact with Spike.☆39Jan 19, 2026Updated 7 months ago
- Convert an image to a GDS format for inclusion in a zerotoasic project☆19Jun 16, 2022Updated 4 years ago
- SurgeFuzz: Surge-Aware Directed Fuzzing for CPU Designs (ICCAD 2023)☆23Dec 5, 2024Updated last year
- TinyQV - Crowdsourced Risc-V SoC☆39Aug 12, 2026Updated 2 weeks ago
- Home of everything RPGA! From schematics and board files to buildable examples!☆19Aug 10, 2024Updated 2 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- An open-source, JEDEC JESD270-4A-compliant HBM4 memory subsystem (controller + PHY-shim + DFT + RAS + security wrapper) tightly coupled t…☆23Jun 14, 2026Updated 2 months ago
- SiliconCompiler Design Gallery☆76Updated this week
- Learn the Design of a 6-stage pipelined RISC-V CPU☆16Oct 22, 2025Updated 10 months ago
- IHP 130nm ASIC tapeout of a 2x2 bfloat16 matrix matrix multiplication with DFT infrastructure. Iteration on the previous accelerator tape…☆42Jul 10, 2026Updated last month
- RISC-V Superscalar Educational Simulator based on Tomasulo's Algorithm☆36Nov 1, 2025Updated 9 months ago
- RISC-V Configuration Structure☆41Oct 30, 2024Updated last year
- ☆16Updated this week
- ☆11Apr 24, 2022Updated 4 years ago
- An attendance calculator web extension that integrates with the PESU Academy webpage☆10Sep 29, 2024Updated last year
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Source code & scripts for experimental characterization and demonstration of 1) simultaneous many-row activation, 2) up to nine-input maj…☆18May 17, 2024Updated 2 years ago
- Modular RISC-V implementation & SoC☆18Aug 3, 2026Updated 3 weeks ago
- Baremetal Backtracing on RISC-V☆16Jun 22, 2021Updated 5 years ago
- An open source hardware engine for Open vSwitch on FPGA☆27Dec 8, 2012Updated 13 years ago
- A linux PCIe driver for Altera☆11Oct 9, 2018Updated 7 years ago
- my rc files☆12Mar 16, 2016Updated 10 years ago
- SystemVerilog linter☆389Nov 6, 2025Updated 9 months ago
- Demonstrate using MCP with Pydantic AI framework☆14Mar 14, 2025Updated last year
- Play tetris in typst☆12Dec 22, 2023Updated 2 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- UVM testbench environment consisting of an APB driver, high level SPI controller model, and SPI verification testbench based upon an LPC2…☆16Dec 23, 2024Updated last year
- Framework for writing tests for RISC-V CPU/SOC validation.☆11Jan 19, 2026Updated 7 months ago
- Xv6 ports for RISC-V☆15Nov 25, 2024Updated last year
- MESMERIC: A Software-based NVM Emulator Supporting Read/Write Asymmetric Latencies☆10Oct 1, 2020Updated 5 years ago
- SoC for muntjac☆14Jun 18, 2025Updated last year
- RISC-V Core Local Interrupt Controller (CLINT)☆33Aug 7, 2026Updated 2 weeks ago
- Docker image for NS-3 Network Simulator v.3.30☆13Apr 11, 2021Updated 5 years ago