IBM / pfloatLinks
A 8-/16-/32-/64-bit floating point number family
☆16Updated 3 years ago
Alternatives and similar repositories for pfloat
Users that are interested in pfloat are comparing it to the libraries listed below
Sorting:
- An implementation of a BinaryConnect network for cifar10☆11Updated 6 years ago
- Approximate layers - TensorFlow extension☆26Updated 7 months ago
- ☆71Updated 5 years ago
- HW/SW co-design of sentence-level energy optimizations for latency-aware multi-task NLP inference☆52Updated last year
- A Out-of-box PyTorch Scaffold for Neural Network Quantization-Aware-Training (QAT) Research. Website: https://github.com/zhutmost/neuralz…☆25Updated 2 years ago
- Training with Block Minifloat number representation☆17Updated 4 years ago
- Fork of upstream onnxruntime focused on supporting risc-v accelerators☆88Updated 2 years ago
- Chameleon: Adaptive Code Optimization for Expedited Deep Neural Network Compilation☆27Updated 6 years ago
- BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing☆146Updated 5 years ago
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆59Updated last month
- ☆33Updated 2 years ago
- Official implementation of "Searching for Winograd-aware Quantized Networks" (MLSys'20)☆27Updated 2 years ago
- ☆19Updated 5 years ago
- TQT's pytorch implementation.☆21Updated 3 years ago
- Eyeriss chip simulator☆38Updated 5 years ago
- Provides the code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Luk…☆19Updated 6 years ago
- ☆23Updated 4 years ago
- Simulator for BitFusion☆102Updated 5 years ago
- ☆37Updated 3 years ago
- GoldenEye is a functional simulator with fault injection capabilities for common and emerging numerical formats, implemented for the PyTo…☆26Updated last year
- Post-training sparsity-aware quantization☆34Updated 2 years ago
- This repository containts the pytorch scripts to train mixed-precision networks for microcontroller deployment, based on the memory contr…☆50Updated last year
- DAC System Design Contest 2020☆29Updated 5 years ago
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆49Updated 8 months ago
- My name is Fang Biao. I'm currently pursuing my Master degree with the college of Computer Science and Engineering, Si Chuan University, …☆52Updated 2 years ago
- This is the implementation for paper: AdaTune: Adaptive Tensor Program CompilationMade Efficient (NeurIPS 2020).☆14Updated 4 years ago
- ☆19Updated 4 years ago
- ☆20Updated 9 months ago
- Open Source Compiler Framework using ONNX as Frontend and IR☆33Updated 3 years ago
- SAMO: Streaming Architecture Mapping Optimisation☆34Updated 2 years ago