FPGA verilog and firmware for TKey, the flexible and open USB security key 🔑
☆435Apr 9, 2026Updated 3 weeks ago
Alternatives and similar repositories for tillitis-key1
Users that are interested in tillitis-key1 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- SSH Agent for TKey, the flexible open hardware/software USB security key 🔑☆143Apr 29, 2026Updated last week
- Vendor signing and user verification of TKey genuineness☆44Oct 15, 2025Updated 6 months ago
- age plugin for keeping keys with a TKey USB security key☆35Sep 11, 2025Updated 7 months ago
- Develop applications for the Tillitis TKey-1 an open source, open hardware FPGA-based USB security token using TinyGo☆35Jun 10, 2025Updated 10 months ago
- The source to the Developer Handbook for TKey.☆16Apr 17, 2026Updated 2 weeks ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- The code for an FPGA softcore comparison☆11Jun 21, 2020Updated 5 years ago
- Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards☆48Feb 12, 2026Updated 2 months ago
- Experiments with Cologne Chip's GateMate FPGA architecture☆18Nov 16, 2023Updated 2 years ago
- VHDLproc is a VHDL preprocessor☆24May 12, 2022Updated 3 years ago
- Virtual development board for HDL design☆42Mar 31, 2023Updated 3 years ago
- Solo 1 firmware in C☆2,377Nov 13, 2022Updated 3 years ago
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆96Updated this week
- A list of mainboards with their status of BootGuard. See https://felixsinger.github.io/bootguard-status☆29Feb 3, 2026Updated 3 months ago
- Library of reusable VHDL components☆28Mar 7, 2024Updated 2 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- MAUS Arduino USB Mouse Jiggler – Mini Programmable ATtiny85 – Open Source☆39Jan 16, 2026Updated 3 months ago
- EFI configuration for slax☆19Feb 24, 2020Updated 6 years ago
- Tests to evaluate the support of VHDL 2008 and VHDL 2019 features☆32Jan 30, 2025Updated last year
- System76 Open Source Embedded Controller☆368Updated this week
- Modern Cryptographic Firmware☆484Mar 26, 2026Updated last month
- ECP5 FPGA DEV BOARD☆10Apr 19, 2021Updated 5 years ago
- The first-ever opensource soft core for PCIE EndPoint. Without vendor-locked HMs for Data Link, Transaction, Application layers. With sta…☆72Updated this week
- OSVVM project simulation scripts. Scripts are tedious. These scripts simplify the steps to compile your project for simulation☆14Apr 23, 2026Updated last week
- A GUI application for managing Solo v2 security keys☆11Apr 27, 2026Updated last week
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Trying to verify Verilog/VHDL designs with formal methods and tools☆43Mar 7, 2024Updated 2 years ago
- Betrusted embedded controller (UP5K)☆49Dec 22, 2023Updated 2 years ago
- ☆15Sep 13, 2024Updated last year
- Designs of first-order SCA-secure hardware implementations of AES encryption/decryptoin dedicated to Xilinx FPGAs (using BRAM)☆17Dec 24, 2020Updated 5 years ago
- VHDL Code for infrastructural blocks (designed for FPGA)☆15Oct 26, 2022Updated 3 years ago
- SystemVerilog synthesis tool☆232Mar 10, 2025Updated last year
- ☆56Oct 24, 2022Updated 3 years ago
- A VHDL Core Library.☆18Mar 29, 2017Updated 9 years ago
- Build your hardware, easily!☆3,863Updated this week
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Scots Army Knife for electronics☆2,145Apr 27, 2026Updated last week
- PCIe (1.0a to 2.0) Virtual Root Complex model, in C, co-simulating with Verilog, SystemVerilog and VHDL, with Endpoint capabilities☆147Mar 6, 2026Updated 2 months ago
- Episode I - RISCV CPU implementation tutorial for Cologne Chip Gatemate E1, adopted from https://github.com/BrunoLevy/learn-fpga☆17Apr 7, 2026Updated 3 weeks ago
- Automated Git mirror of Gaisler's GRLIB/Leon3 releases☆21Nov 2, 2025Updated 6 months ago
- SERV - The SErial RISC-V CPU☆1,791Feb 19, 2026Updated 2 months ago
- AMD Generic Encapsulated Software Architecture Platform Security Processor Configuration Block manipulation library☆17Dec 18, 2025Updated 4 months ago
- Solo 2 firmware in Rust☆658Updated this week