FPGA verilog and firmware for TKey, the flexible and open USB security key π
β441Jul 21, 2026Updated this week
Alternatives and similar repositories for tillitis-key1
Users that are interested in tillitis-key1 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Vendor signing and user verification of TKey genuinenessβ44Jun 16, 2026Updated last month
- The code for an FPGA softcore comparisonβ11Jun 21, 2020Updated 6 years ago
- Secure, robust, and efficient delta updates for executablesβ18Jul 19, 2026Updated last week
- Experiments with Cologne Chip's GateMate FPGA architectureβ19Nov 16, 2023Updated 2 years ago
- Constraint files for Hardware Description Language (HDL) designs targeting FPGA boardsβ48Feb 12, 2026Updated 5 months ago
- Managed Kubernetes at scale on DigitalOcean β’ AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- VHDLproc is a VHDL preprocessorβ24May 12, 2022Updated 4 years ago
- Project Peppercorn - GateMate FPGA Bitstream Documentationβ45Jun 16, 2026Updated last month
- Virtual development board for HDL designβ42Mar 31, 2023Updated 3 years ago
- Verilog implementation of the 32-bit version of the Blake2 hash functionβ22Dec 17, 2025Updated 7 months ago
- Solo 1 firmware in Cβ2,379Nov 13, 2022Updated 3 years ago
- A list of mainboards with their status of BootGuard. See https://felixsinger.github.io/bootguard-statusβ31Feb 3, 2026Updated 5 months ago
- Library of reusable VHDL componentsβ28Mar 7, 2024Updated 2 years ago
- A Formal Verification Methodology to lower the adoption barriers for Formal Verification of ASIC and FPGA designs in the Space sector (thβ¦β24Jun 29, 2026Updated 3 weeks ago
- Designs of first-order SCA-secure hardware implementations of AES encryption/decryptoin dedicated to Xilinx FPGAs (using BRAM)β17Dec 24, 2020Updated 5 years ago
- AI Agents on DigitalOcean Gradient AI Platform β’ AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- MAUS Arduino USB Mouse Jiggler β Mini Programmable ATtiny85 β Open Sourceβ39Jan 16, 2026Updated 6 months ago
- EFI configuration for slaxβ19Feb 24, 2020Updated 6 years ago
- Tests to evaluate the support of VHDL 2008 and VHDL 2019 featuresβ32Jan 30, 2025Updated last year
- System76 Open Source Embedded Controllerβ370Jun 9, 2026Updated last month
- OpenTitan: Open source silicon root of trustβ3,562Updated this week
- ECP5 FPGA DEV BOARDβ10Apr 19, 2021Updated 5 years ago
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>β¦β98May 8, 2026Updated 2 months ago
- Blackwire SpinalHDL components implementing WireGuard primitivesβ16Aug 16, 2023Updated 2 years ago
- Automated Git mirror of Gaisler's GRLIB/Leon3 releasesβ21Jul 4, 2026Updated 3 weeks ago
- Deploy to Railway using AI coding agents - Free Credits Offer β’ AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- A GUI application for managing Solo v2 security keysβ11Updated this week
- Simple 6502 system on a ULX3S FPGA boardβ19Feb 26, 2020Updated 6 years ago
- Betrusted embedded controller (UP5K)β49Dec 22, 2023Updated 2 years ago
- OSVVM project simulation scripts. Scripts are tedious. These scripts simplify the steps to compile your project for simulationβ14Jun 18, 2026Updated last month
- β15Sep 13, 2024Updated last year
- β56Oct 24, 2022Updated 3 years ago
- SystemVerilog synthesis toolβ234Mar 10, 2025Updated last year
- Trying to verify Verilog/VHDL designs with formal methods and toolsβ43Mar 7, 2024Updated 2 years ago
- This is an example of how TerosHDL can generate your documentation project from the command line. So you can integrate it in your CI workβ¦β10Jan 13, 2022Updated 4 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer β’ AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- VHDL Code for infrastructural blocks (designed for FPGA)β15Oct 26, 2022Updated 3 years ago
- Build your hardware, easily!β4,011Updated this week
- Scots Army Knife for electronicsβ2,174Updated this week
- An open-source VHDL library for FPGA design.β32Jun 2, 2022Updated 4 years ago
- A VHDL Core Library.β18Mar 29, 2017Updated 9 years ago
- PCIe (1.0a to 2.0) Virtual Root Complex model, in C, co-simulating with Verilog, SystemVerilog and VHDL, with Endpoint capabilitiesβ148Jun 16, 2026Updated last month
- Orbtrace & supporting hardware circuit diagrams etc.β26Oct 11, 2023Updated 2 years ago