FPGA verilog and firmware for TKey, the flexible and open USB security key 🔑
☆436Apr 9, 2026Updated last month
Alternatives and similar repositories for tillitis-key1
Users that are interested in tillitis-key1 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- age plugin for keeping keys with a TKey USB security key☆35Sep 11, 2025Updated 8 months ago
- The source to the Developer Handbook for TKey.☆15Apr 17, 2026Updated last month
- The code for an FPGA softcore comparison☆11Jun 21, 2020Updated 5 years ago
- VHDLproc is a VHDL preprocessor☆24May 12, 2022Updated 4 years ago
- A simple, modern and secure encryption tool (and Go library) with small explicit keys, no config options, and UNIX-style composability.☆19Feb 28, 2023Updated 3 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- Virtual development board for HDL design☆42Mar 31, 2023Updated 3 years ago
- Solo 1 firmware in C☆2,375Nov 13, 2022Updated 3 years ago
- Verilog implementation of the 32-bit version of the Blake2 hash function☆22Dec 17, 2025Updated 5 months ago
- A list of mainboards with their status of BootGuard. See https://felixsinger.github.io/bootguard-status☆32Feb 3, 2026Updated 3 months ago
- Tool to fix FT2232's uart interface configuration for ecp5evn (LFE5UM5G-85F-EVN) board☆12Jun 17, 2021Updated 4 years ago
- Project Peppercorn - GateMate FPGA Bitstream Documentation☆41May 9, 2026Updated 2 weeks ago
- MAUS Arduino USB Mouse Jiggler – Mini Programmable ATtiny85 – Open Source☆39Jan 16, 2026Updated 4 months ago
- Tests to evaluate the support of VHDL 2008 and VHDL 2019 features☆32Jan 30, 2025Updated last year
- OpenTitan: Open source silicon root of trust☆3,376May 19, 2026Updated last week
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- System76 Open Source Embedded Controller☆370Updated this week
- Modern Cryptographic Firmware☆486May 18, 2026Updated last week
- ECP5 FPGA DEV BOARD☆10Apr 19, 2021Updated 5 years ago
- Simple 6502 system on a ULX3S FPGA board☆18Feb 26, 2020Updated 6 years ago
- The first-ever opensource soft core for PCIE EndPoint. Without vendor-locked HMs for Data Link, Transaction, Application layers. With sta…☆74May 13, 2026Updated last week
- OSVVM project simulation scripts. Scripts are tedious. These scripts simplify the steps to compile your project for simulation☆14May 15, 2026Updated last week
- A GUI application for managing Solo v2 security keys☆11May 18, 2026Updated last week
- Trying to verify Verilog/VHDL designs with formal methods and tools☆43Mar 7, 2024Updated 2 years ago
- This is an example of how TerosHDL can generate your documentation project from the command line. So you can integrate it in your CI work…☆10Jan 13, 2022Updated 4 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Betrusted embedded controller (UP5K)☆49Dec 22, 2023Updated 2 years ago
- ☆15Sep 13, 2024Updated last year
- VHDL Code for infrastructural blocks (designed for FPGA)☆15Oct 26, 2022Updated 3 years ago
- SystemVerilog synthesis tool☆233Mar 10, 2025Updated last year
- ☆56Oct 24, 2022Updated 3 years ago
- Build your hardware, easily!☆3,884May 18, 2026Updated last week
- Scots Army Knife for electronics☆2,152Updated this week
- nextpnr portable FPGA place and route tool☆1,671Updated this week
- PCIe (1.0a to 2.0) Virtual Root Complex model, in C, co-simulating with Verilog, SystemVerilog and VHDL, with Endpoint capabilities☆146Mar 6, 2026Updated 2 months ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Episode I - RISCV CPU implementation tutorial for Cologne Chip Gatemate E1, adopted from https://github.com/BrunoLevy/learn-fpga☆17Apr 7, 2026Updated last month
- Automated Git mirror of Gaisler's GRLIB/Leon3 releases☆21Nov 2, 2025Updated 6 months ago
- Raspberry Pico powered Xilinx Virtual Cable - Xilinx JTAG Cable! This is now quite fast, thanks to tom01h! We also support JTAG + serial …☆485Oct 27, 2024Updated last year
- SERV - The SErial RISC-V CPU☆1,801Feb 19, 2026Updated 3 months ago
- Official Git repo of the doineedavpn.com website☆40May 9, 2026Updated 2 weeks ago
- AMD Generic Encapsulated Software Architecture Platform Security Processor Configuration Block manipulation library☆17Dec 18, 2025Updated 5 months ago
- Solo 2 firmware in Rust☆667May 15, 2026Updated last week