splinedrive / KianV_rv32ia_uLinux_SoCLinks
☆21Updated last year
Alternatives and similar repositories for KianV_rv32ia_uLinux_SoC
Users that are interested in KianV_rv32ia_uLinux_SoC are comparing it to the libraries listed below
Sorting:
- RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32☆54Updated 2 years ago
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆109Updated last week
- FPGA based microcomputer sandbox for software and RTL experimentation☆75Updated this week
- Minimal DVI / HDMI Framebuffer☆83Updated 5 years ago
- Wishbone interconnect utilities☆43Updated last week
- ☆15Updated 7 months ago
- A Risc-V SoC for Tiny Tapeout☆43Updated 3 weeks ago
- FLIX-V: FPGA, Linux and RISC-V☆41Updated 2 years ago
- Experimental Tiny Tapeout chip on IHP SG13G2 0.13 μm BiCMOS process☆19Updated 8 months ago
- Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7☆91Updated 6 months ago
- A simple risc-v CPU /GPU running on an Arty A7-100T FPGA board☆30Updated 4 years ago
- Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…☆33Updated 10 months ago
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆82Updated 2 months ago
- ☆60Updated 4 years ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆58Updated last month
- Experimental FPGA project for streaming two MIPI CSI camera streams to an HDMI monitor using a ULX3S FPGA board☆32Updated 2 years ago
- Basic USB 1.1 Host Controller for small FPGAs☆97Updated 5 years ago
- ♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.☆102Updated 3 weeks ago
- A pipelined RISC-V processor☆63Updated 2 years ago
- ☆71Updated last year
- Small Processing Unit 32: A compact RV32I CPU written in Verilog☆70Updated 3 years ago
- New clean hdmi implementation for ulx3s, icestick, icoboard, arty7, colorlight i5 and blackicemx! With tmds encoding hacked down from dvi…☆104Updated 3 months ago
- Experimental flows using nextpnr for Xilinx devices☆54Updated last month
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆92Updated 7 years ago
- Reusable Verilog 2005 components for FPGA designs☆49Updated 2 weeks ago
- CologneChip GateMate FPGA Module: GMM-7550☆27Updated 2 months ago
- Greyhound on IHP SG13G2 0.13 μm BiCMOS process☆75Updated last week
- A SoC for DOOM☆19Updated 4 years ago
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆83Updated last year
- Generate Zynq configurations without using the vendor GUI☆30Updated 2 years ago