Binary Neural Network Framework for FPGA(Differentiable LUT)
☆172Aug 12, 2025Updated 7 months ago
Alternatives and similar repositories for BinaryBrain
Users that are interested in BinaryBrain are comparing it to the libraries listed below
Sorting:
- Original FPGA platform☆74Feb 28, 2026Updated 3 weeks ago
- PolyLUT is the first quantized neural network training methodology that maps a neuron to a LUT while using multivariate polynomial functi…☆55Feb 9, 2024Updated 2 years ago
- Karuta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for F…☆108Jan 29, 2022Updated 4 years ago
- original 8bit CPU of ICF3-Z☆12Feb 20, 2020Updated 6 years ago
- RV32I Implementation on TangNano9K☆11Dec 24, 2022Updated 3 years ago
- A lightweight Ethernet MAC Controller IP for FPGA prototyping☆14Oct 19, 2020Updated 5 years ago
- GUINNESS: A GUI-based binarized deep Neural NEtwork SyntheSizer toward an FPGA☆181Jul 20, 2019Updated 6 years ago
- Game Boy / Game Boy Color emulator running on an FPGA☆18Nov 2, 2025Updated 4 months ago
- FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Ubuntu 20.04 Desktop Images (for Xilinx:Zynq Ultrascale+ MPSoC)☆14Nov 27, 2021Updated 4 years ago
- NNgen: A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network☆362Oct 17, 2023Updated 2 years ago
- A hardware implementation of a feed-forward Convolutional Neural Network called XNOR-Net which has faster execution due to the replacemen…☆17Sep 16, 2018Updated 7 years ago
- System Verilog code describing a fully combinational binarized neural network.☆34Jul 6, 2018Updated 7 years ago
- ☆38Jul 25, 2022Updated 3 years ago
- This is an unofficial implementation of the paper "Sub-Image Anomaly Detection with Deep Pyramid Correspondences".☆22Sep 24, 2023Updated 2 years ago
- experimental binary net implementation in chainer☆102Feb 14, 2016Updated 10 years ago
- A CPU that executes brainf**k language. Can be synthesized on FPGA☆12Jul 28, 2017Updated 8 years ago
- 10G Ethernet MAC implementation☆23Jul 13, 2020Updated 5 years ago
- This is an unofficial implementation of the paper "Towards Total Recall in Industrial Anomaly Detection".☆24Jan 23, 2024Updated 2 years ago
- A fully open source low cost FPGA board for makers , hobbyist and student for endless possibility.☆37Dec 13, 2025Updated 3 months ago
- Code for High-Capacity Expert Binary Networks (ICLR 2021).☆27Dec 3, 2021Updated 4 years ago
- Implementation of BinaryConnect on Pytorch☆39Apr 28, 2021Updated 4 years ago
- Raptor end-to-end FPGA Compiler and GUI☆96Dec 11, 2024Updated last year
- ☆30Feb 26, 2023Updated 3 years ago
- [CVPR 2024] Official implementation for "A&B BNN: Add&Bit-Operation-Only Hardware-Friendly Binary Neural Network"☆24Dec 5, 2025Updated 3 months ago
- ☆31Aug 4, 2024Updated last year
- Structured Binary Neural Networks for Image Recognition☆18Nov 18, 2021Updated 4 years ago
- ☆143Jul 25, 2024Updated last year
- ☆12Jun 1, 2023Updated 2 years ago
- Pytorch implementation of our paper accepted by NeurIPS 2020 -- Rotated Binary Neural Network☆83Dec 30, 2022Updated 3 years ago
- Minimal parts Oscilloscope☆14Feb 5, 2023Updated 3 years ago
- The official implementation of BiViT: Extremely Compressed Binary Vision Transformers☆16Jun 18, 2023Updated 2 years ago
- sump3 logic analyzer☆41Feb 2, 2026Updated last month
- ☆13Jun 12, 2018Updated 7 years ago
- Code generation tool for control and status registers☆450Mar 14, 2026Updated last week
- Information on cores available on the Ulx3s ECP5 FPGA board☆14May 1, 2020Updated 5 years ago
- ☆236Mar 20, 2023Updated 3 years ago
- Sample scripts for FPGA-based AI Edge Contest 2019☆11Mar 20, 2020Updated 6 years ago
- FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)☆284Dec 5, 2019Updated 6 years ago
- pyconjp☆12Oct 12, 2015Updated 10 years ago