Alternatives and similar repositories for axi-csi-rx

Users that are interested in axi-csi-rx are comparing it to the libraries listed below

• parallella / parallella-fpga
  FPGA Development for the parallella
  ☆19Updated 7 years ago
• warclab / dyract
  DyRACT Open Source Repository
  ☆16Updated 9 years ago
• stacksmith / fpgasm
  FPGA assembler! Create bare-metal FPGA designs without Verilog or VHDL (Not to self: use Lisp next time)
  ☆53Updated 3 years ago
• olofk / simple_spi
  SPI core
  ☆14Updated 5 years ago
• YosysHQ / yosys-plugins
  Yosys Plugins
  ☆21Updated 5 years ago
• adamjvr / ZyncMV
  ZyncMV is an open source machine/computer vision platform using the Xilinx Zync FPGA+ ARM Cortex A9 SoC
  ☆19Updated 8 years ago
• Kirill888 / parallella-fpga-dummy-io
  Sample minimal Vivado project for Parallella FPGA
  ☆42Updated 9 years ago
• parallella / parallella-utils
  Library of various community contributed Parallella board admin scripts and programs
  ☆39Updated 8 years ago
• whitequark / icefloorplan
  iCE40 floorplan viewer
  ☆24Updated 7 years ago
• f32c / tools
  ULX2S / ULX3S FPGA JTAG programmer & tools (Lattice XP2 / ECP5)
  ☆22Updated 2 weeks ago
• jsloan256 / titan
  Altium PCB project for the Titan PCI Express development card. This card uses the Lattice ECP5 FPGA.
  ☆19Updated 10 years ago
• FPGAwars / Platformio-FPGA
  FPGA development in PlatformIO, using the Icestorm opensource toolchain
  ☆21Updated 8 years ago
• FPGAwars / apio-examples
  Apio examples
  ☆37Updated this week
• RHSResearchLLC / xvcd
  Xilinx Virtual Cable Daemon
  ☆20Updated 5 years ago
• AnttiLukats / HackaZynq
  Open Source ZYNQ Board
  ☆31Updated 9 years ago
• alvieboy / ZPUino-HDL
  ZPUino HDL implementation
  ☆90Updated 6 years ago
• fpga-logi / logi-boards
  Boards schematic and layout (including extension boards: camera, etc)
  ☆38Updated 9 years ago
• pabennett / chiptools
  ChipTools is a utility to automate FPGA build and verification
  ☆24Updated 3 years ago
• jbush001 / FPGAWhack
  Video Effects on VGA
  ☆14Updated 6 years ago
• myriadrf / STREAM
  FPGA development platform for high-performance RF and digital design
  ☆32Updated 9 years ago
• cyrozap / openocd-xilinx-loader
  Some Python scripts to program Xilinx FPGAs using OpenOCD
  ☆24Updated 8 years ago
• parallella / parallella-uboot
  Official U-Boot package for Parallella
  ☆41Updated 10 years ago
• www-asics-ws / usb1_device
  USB 1.1 Device IP Core
  ☆21Updated 7 years ago
• ClusterM / clujtag-client
  Client for JTAG programmer for AVR microcontrollers
  ☆15Updated last year
• Poofjunior / HardwareModules
  A collection of portable hardware modules
  ☆27Updated 9 years ago
• andrecp / myhdl_simple_uart
  A very simple UART implementation in MyHDL
  ☆17Updated 10 years ago
• cambridgehackers / fpgajtag
  A simple jtag programming tool that has been verified on a variety of Xilinx Series7 platforms.
  ☆35Updated 3 years ago
• mwelling / beagle-wire
  ICE40 FPGA Cape for Beaglebone
  ☆51Updated 4 years ago
• udara28 / SDRAM_Controller
  Implementation of a SDRAM controller in MyHDL (http://www.myhdl.org/)
  ☆21Updated 9 years ago
• FPGALibre / fpgacores
  IP cores for the FPGA Libre project
  ☆12Updated 7 years ago