Obijuan / ACC
Apollo CPU Core in Verilog. For learning and having fun with open FPGA
☆44Updated 8 years ago
Alternatives and similar repositories for ACC:
Users that are interested in ACC are comparing it to the libraries listed below
- Opensource building blocks for TinyFPGA microcontrollers and retro computers.☆17Updated 7 years ago
- Verilog implementation of the educational "Simplez" processor☆41Updated 6 months ago
- ☆25Updated 6 years ago
- Icestudio collection with the blocks of the FPGA Jedi hardware Academy☆38Updated 7 months ago
- The CAT Board is a Raspberry Pi HAT with a Lattice iCE40HX FPGA.☆61Updated 11 months ago
- FPGA assembler! Create bare-metal FPGA designs without Verilog or VHDL (Not to self: use Lisp next time)☆53Updated 3 years ago
- ZPUino HDL implementation☆89Updated 6 years ago
- A Javascript library for generating blocks for the ICEstudio FPGA development environment☆10Updated 6 years ago
- ☆58Updated last year
- Enigma in FPGA☆26Updated 5 years ago
- Bootloader for Fomu☆101Updated 2 years ago
- StickIt! board and modules that support the XuLA FPGA board.☆20Updated 9 years ago
- Example code in Verilog for the Blackice II FPGA☆27Updated 5 years ago
- Block probes for Icestudio => Sigrok integration (with Pulseview GUI)☆33Updated 6 months ago
- Space Invaders in Verilog for the iCE40 H1K☆17Updated 11 months ago
- Icestudio Collection for working with Memories☆11Updated 6 months ago
- FPGA development in PlatformIO, using the Icestorm opensource toolchain☆21Updated 8 years ago
- OpenFPGA☆33Updated 6 years ago
- Icestudio collection for standard Input-Output in different devices☆14Updated 7 months ago
- Video Effects on VGA☆14Updated 6 years ago
- basic example of litex on colorLight 5A-75B based on fpga_101/lab004☆31Updated 2 years ago
- ☆23Updated 9 years ago
- Test of ICEstick PLL usage with Yosys/Arachne-PNR/Icetools☆21Updated 8 years ago
- A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems☆43Updated 2 years ago
- This repository contains software for BeagleWire. It is a realization of my project for GSOC-2017☆46Updated 6 years ago
- Dual MikroBUS board for Upduino 2 FPGA☆18Updated 6 years ago
- Repository and Wiki for Chip Hack events.☆50Updated 3 years ago
- VHDL simulation model for PADAUK PDK microcontrollers☆19Updated 4 years ago
- RISC-V soft core running on Colorlight 5B-74B.☆30Updated 3 years ago
- FPGA 101 - Workshop materials☆72Updated 5 years ago