Alternatives and similar repositories for chiptools

Users that are interested in chiptools are comparing it to the libraries listed below

• pabennett / ethernet_mac
  A VHDL implementation of an Ethernet MAC
  ☆16Updated 13 years ago
• ObKo / USBCore
  USB Full-Speed/Hi-Speed Device Controller core for FPGA
  ☆32Updated 5 years ago
• makestuff / libfpgalink
  LIB:Library for interacting with an FPGA over USB
  ☆85Updated 4 years ago
• Kirill888 / parallella-fpga-dummy-io
  Sample minimal Vivado project for Parallella FPGA
  ☆45Updated 9 years ago
• antmicro / usb-test-suite-build
  Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores
  ☆52Updated 2 years ago
• AnttiLukats / HackaZynq
  Open Source ZYNQ Board
  ☆31Updated 10 years ago
• TUM-LIS / glip
  Generic Logic Interfacing Project
  ☆48Updated 5 years ago
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆66Updated 2 months ago
• jsyk / miilink
  Connecting FPGA and MCU using Ethernet RMII
  ☆23Updated 9 years ago
• HarmonInstruments / verilog
  ☆20Updated 3 years ago
• marsohod4you / FPGA_FM_transmitter
  Implementation of FM (frequency modulation) radio transmitter in FPGA Altera Cyclone III.
  ☆14Updated 9 years ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆61Updated 2 years ago
• Elphel / vdt-plugin
  mirror of https://git.elphel.com/Elphel/vdt-plugin
  ☆15Updated 8 years ago
• Poofjunior / fpga_fast_serial_sort
  a parallel sorting algorithm implemented in hardware that sorts data in linear time as it arrives serially
  ☆41Updated 9 years ago
• blackmesalabs / MesaBusProtocol
  Flexible Byte transport protocol for bus bridging CPUs to FPGAs over UART,SPI,SERDES physical interfaces
  ☆35Updated last year
• cambridgehackers / fpgajtag
  A simple jtag programming tool that has been verified on a variety of Xilinx Series7 platforms.
  ☆36Updated 3 years ago
• chiggs / oc_jpegencode
  Fork of OpenCores jpegencode with Cocotb testbench
  ☆46Updated 10 years ago
• pliu6 / vhd2vl
  vhd2vl is designed to translate synthesizable VHDL into Verilog 2001.
  ☆26Updated 9 years ago
• Elphel / x393
  mirror of https://git.elphel.com/Elphel/x393
  ☆40Updated 2 years ago
• hamsternz / FPGA_GigabitTx
  Sending UDP packets out over a Gigabit PHY with an FPGA.
  ☆44Updated 9 years ago
• UGent-HES / tlut_flow
  TLUT tool flow for parameterised configurations for FPGAs
  ☆16Updated last year
• cloudxcc / Arduissimo
  Open source MPSoC running 620 MIPS (CHStone) of RISC-V (RV32iMC) programms on the ARTY board (XC7A35T).
  ☆22Updated 6 years ago
• www-asics-ws / usb1_device
  USB 1.1 Device IP Core
  ☆21Updated 8 years ago
• andrecp / myhdl_simple_uart
  A very simple UART implementation in MyHDL
  ☆17Updated 11 years ago
• gtjennings1 / UPDuino-LH154Q01-Display
  Design to connect Lattice Ultraplus FPGA to LH154Q01 Display
  ☆28Updated 7 years ago
• enjoy-digital / litejesd204b
  Small footprint and configurable JESD204B core
  ☆50Updated 2 months ago
• OpenDGPS / zynq-axi-dma-sg
  Simple C snippet to transfer DMA memory with scatter/gather on a Zynq 7020
  ☆56Updated 8 years ago
• udara28 / SDRAM_Controller
  Implementation of a SDRAM controller in MyHDL (http://www.myhdl.org/)
  ☆21Updated 9 years ago
• enjoy-digital / daisho
  Test of the USB3 IP Core from Daisho on a Xilinx device
  ☆100Updated 6 years ago
• embecosm / chiphack
  Repository and Wiki for Chip Hack events.
  ☆52Updated 4 years ago