MorgothCreator / atmega-xmega-soft-coreLinks
Mega/Xmega soft core RTL design.
☆11Updated 5 years ago
Alternatives and similar repositories for atmega-xmega-soft-core
Users that are interested in atmega-xmega-soft-core are comparing it to the libraries listed below
Sorting:
- TI-99/4A FPGA implementation for the Icestorm toolchain☆18Updated 9 months ago
- Next186 SoC PC☆16Updated 11 years ago
- A complete 65C02 computer with VGA output on a Lattice Ultra Plus FPGA☆29Updated 6 years ago
- EDA Tools: Xilinx ISE 14.7 Dockerfile☆21Updated 3 years ago
- "Designing Video Game Hardware in Verilog" in iCE40HX8K Breakout Board.☆17Updated 5 years ago
- A highly-configurable and compact variant of the ZPU processor core☆35Updated 10 years ago
- NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board☆38Updated 3 years ago
- An FPGA/PCI Device Reference Platform☆31Updated 4 years ago
- Mini CPU design with JTAG UART support☆20Updated 4 years ago
- 🔌 CPU86 - Free VHDL CPU8088 IP core - ported to Papilio and Max1000 FPGA☆45Updated 2 months ago
- DVI video out example for prjtrellis☆16Updated 6 years ago
- RGB video input for Altera DE1 board + PAL Modulator☆27Updated 2 years ago
- Minimig project example for FleaFPGA Ohm Experimenter Board☆26Updated 3 years ago
- Propeller 1 design and example files to be run on FPGA boards.☆22Updated 6 years ago
- VGA-compatible text mode functionality☆17Updated 5 years ago
- soft processor core compatible with i586 instruction set(Intel Pentium) developped on Nexys4 board boots linux kernel with a ramdisk cont…☆33Updated 8 years ago
- Building My Dream Computer☆10Updated 2 years ago
- iCE40HX8K development board with SRAM and bus for fast ADC, DAC, IOs☆38Updated 11 months ago
- sn76489an compatible Verilog core, with emphasis on FPGA implementation and Megadrive/Master System compatibility☆31Updated 9 months ago
- Retro computing on the Ulx3s ECP5 FPGA board☆24Updated 3 years ago
- Mostly AVR compatible FPGA soft-core☆28Updated 4 years ago
- A complete HDMI transmitter implementation in VHDL☆22Updated 3 months ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆11Updated 2 years ago
- A small 6502 system build on a Lattice Icestick FPGA development board☆15Updated 6 years ago
- Simple fixed-cycle SDRAM Controller☆28Updated 5 years ago
- A repository for a random collection of stuff pertaining to reverse engineering the Pano Logic G2 "zero" client☆34Updated 6 years ago
- How to use the Intel JTAG primitive without using virtual JTAG☆17Updated 3 years ago
- SNES for MiSTer☆16Updated last month
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆63Updated 6 years ago
- Low-area DVI experiment for iCE40 UP5k and HX1k FPGAs☆32Updated 4 years ago