Alternatives and similar repositories for SnakeGame

Users that are interested in SnakeGame are comparing it to the libraries listed below

• hankshyu / Digital-Design
  Hardware Description Language on FPGA
  ☆10Updated 2 years ago
• hankshyu / NYCU-NTU-Course-Archive
  陽明交通大學/台灣大學 修課心得😀
  ☆14Updated last year
• hankshyu / RISC-V_MAC
  MAC system with IEEE754 compatibility
  ☆13Updated 2 years ago
• Ni-ChiTing / IC_contest_cell_based_design
  ☆14Updated 4 years ago
• HsuChiChen / nycu-iclab-2023-fall
  交通大學iclab 2023 fall
  ☆44Updated last year
• Baechu44 / ic_contest
  ☆10Updated last year
• Yu-Maryland / FlowTune
  ☆185Updated 3 years ago
• shubhi704 / APB-Protocol
  ☆55Updated 4 years ago
• JonathanJing / Asynchronous-FIFO
  Asynchronous fifo in verilog
  ☆38Updated 9 years ago
• derek8955 / ic_contest
  IC Contest
  ☆42Updated 2 years ago
• dadongshangu / async_FIFO
  This asynchrounous FIFO deisgn and UVM verificaiton is one case study of me. The design is based on Cliff Cumming's paper and the UVM is…
  ☆65Updated 2 years ago
• sure-trust / VLSI-Project-AXI-to-APB-Bridge
  ☆22Updated 2 years ago
• supojui / NYCU-ICLAB-2023-FALL
  ☆11Updated last year
• hankshyu / ICLab-2023
  Spring 2023 NYCU (prev. NCTU) Integrated Circuit Design Laboratory (ICLab)
  ☆153Updated last year
• pengwubj / hw_interview_questions
  A collection of commonly asked RTL design interview questions
  ☆38Updated 8 years ago
• Siddhi-95 / AHB-to-APB-Bridge-Verification
  Maven Silicon project - AHB-to-APB Bridge Verification using UVM Methodology.
  ☆105Updated 2 years ago
• ekb0412 / 100DaysofRTL
  "100 days of RTL" is a personal project to learn Verilog HDL RTL design in 100 days, using Xilinx Vivado
  ☆108Updated 2 years ago
• abdelazeem201 / ICC2_scripts
  This repository has a list of collaterals needed for ICC2 workshop. It has a modified version of ORCA which was taped-out by NTI.
  ☆22Updated 2 years ago
• max2468tw / IC_Lab
  NCTU 2018 Spring Integrated Circuit Design Laboratory
  ☆24Updated 7 years ago
• zxc31070109 / ICLAB2022FALL
  國立陽明交通大學 電子所 積體電路設計實驗 李鎮宜教授
  ☆14Updated 2 years ago
• kumarrishav14 / AXI
  VIP for AXI Protocol
  ☆163Updated 3 years ago
• smartfoxdata / axi4lite_gpio
  General purpose IO port with AXI4-Lite interface
  ☆10Updated last year
• BoooC / NYCU_ICLAB_2024_FALL
  ☆33Updated last month
• lucky-wfw / ARM_AMBA_Design
  Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.
  ☆137Updated 4 years ago
• vritrv / ROUTER-1X3-RTL-DESIGN
  Architectural design of data router in verilog
  ☆32Updated 6 years ago
• WangXuan95 / FPGA-PNG-decoder
  An FPGA-based PNG image decoder, which can extract original pixels from PNG files. 基于FPGA的PNG图像解码器，可以从PNG文件中解码出原始像素。
  ☆103Updated 2 years ago
• amiq-consulting / amiq_apb
  SystemVerilog VIP for AMBA APB protocol
  ☆86Updated 4 years ago
• Anjali-287 / SPI-Interface
  UVM Testbench to verify serial transmission of data between SPI master and slave
  ☆54Updated 5 years ago
• LD6K / ICLAB-2025-SPRING
  NYCU ICLAB 2025 spring codes & 心得
  ☆21Updated last month
• gupta409 / Processor-UVM-Verification
  System Verilog based Verification of MIPS 5 staged pipelined processor using UVM environment
  ☆118Updated last year