Implementation of Sobel Filter in Verilog
☆30Mar 10, 2017Updated 9 years ago
Alternatives and similar repositories for sobel
Users that are interested in sobel are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Verilog code that does 2D Low Pass Filter on a greyscale image☆10Sep 22, 2015Updated 10 years ago
- Gesture Recognition Based on ALTERA DE2-115 FPGA☆12Mar 18, 2014Updated 12 years ago
- A Verilog implementation of a hand-written digit recognition Neural Network☆11Nov 16, 2024Updated last year
- Design a median filter for a Generic RGB image.☆14Mar 6, 2019Updated 7 years ago
- LZW Compressoion algorithm in verilog☆16Dec 19, 2013Updated 12 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Ultra96 PYNQ入门之一次简单的总结☆14May 21, 2020Updated 6 years ago
- Small projects intended to run on the Digilent Zybo development board, utilizing PetaLinux on the Zynq's ARM processor.☆25Aug 19, 2016Updated 10 years ago
- Verilog Code for a JPEG Decoder☆34Mar 7, 2018Updated 8 years ago
- A RTL-based project in Verilog that shows real-time video captured by a CMOS camera OV7670 and displayed on a monitor through VGA at 640 …☆32Mar 18, 2023Updated 3 years ago
- Modulation and Arbitrary Waveform Generator☆20Feb 16, 2021Updated 5 years ago
- Real-Time Image Processing for ASIC/FGPA☆27Feb 23, 2022Updated 4 years ago
- This repository includes some FPGA projects like VGA control, image processing. So far, fpga can drive a VGA monitor and display an image…☆14Jul 5, 2017Updated 9 years ago
- Hardware interface for USB controller on DE2 FPGA Platform☆27Dec 24, 2021Updated 4 years ago
- Discrete Cosine Transform (DCT) is one of the important image compression algorithms used in image processing applications. Several algor…☆26May 5, 2015Updated 11 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Superscalar Out-of-Order NPU Design on FPGA☆16May 17, 2024Updated 2 years ago
- Tensor Processing Unit implementation in Verilog☆16Aug 12, 2026Updated 3 weeks ago
- Various low power labs using sky130☆13Sep 3, 2021Updated 5 years ago
- ☆26May 16, 2024Updated 2 years ago
- Projects done for Advanced Digital Design with Verilog. Examples include code for applications like Sobel Edge Detection and DTMF generat…☆12Sep 10, 2018Updated 7 years ago
- AES☆16Oct 4, 2022Updated 3 years ago
- ☆19Dec 19, 2018Updated 7 years ago
- Pipelined FFT/IFFT 64 points processor☆11Jul 17, 2014Updated 12 years ago
- ☆27Nov 2, 2017Updated 8 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- An FPGA NES emulator designed by a high level synthesis (HLS)☆16Jun 11, 2017Updated 9 years ago
- 机器人使用了Xilinx的SPARTAN-6系列芯片以及ISE设计工具对机器人控制电路进行了设计和仿真，验证了电路的正确性和可靠性。同时机器人使用了温湿度传感器、人体感应传感器、超声波传感器、震动传感器、有毒气体传感器等，可以对灾区的环境和受困人员进行多方面的检测和响应。还…☆11Nov 15, 2023Updated 2 years ago
- Verilog Implementation of Run Length Encoding for RGB Image Compression☆28Jun 28, 2021Updated 5 years ago
- An adaptive filter was designed that can update its weights according to the application needed (lowpass, highpass or bandpass) using the…☆12Jan 3, 2019Updated 7 years ago
- Memory-mapped VGA display for Xilinx/Zynq/Zedboard, with demo code for using it.☆15Feb 26, 2018Updated 8 years ago
- In this project, low-pass filters and Kalman filters with different window function designs are used to denoise speech signals polluted i…☆11Feb 11, 2023Updated 3 years ago
- Image capture, image filtering and image display (VGA) : picture in picture, edge detection, gray image and smooth image☆76Mar 8, 2014Updated 12 years ago
- SystemVerilog Implementations of CUDA/TensorCore/TPU GEMM Operations☆21Apr 12, 2026Updated 4 months ago
- FPGA implementation of pose detection with Kalman filter. (verilog)☆40Mar 30, 2022Updated 4 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- RTL Synthesis for Fast Arithmetic circuits like Booth encoded Multipliers, Carry Save Adders, Fixed-Point and Floating-Point conversions,…☆22Nov 26, 2018Updated 7 years ago
- Verilog code of Loongson's GS132 core☆12Dec 19, 2019Updated 6 years ago
- Verilog uart receiver and transmitter modules for De0 Nano☆19Oct 24, 2014Updated 11 years ago
- AltOr32 - Alternative Lightweight OpenRisc CPU☆13Dec 17, 2015Updated 10 years ago
- Parallel Array of Simple Cores. Multicore processor.☆101May 16, 2019Updated 7 years ago
- ☆21Nov 18, 2022Updated 3 years ago
- Implementation of the SHA256 Algorithm in Verilog☆39Jan 2, 2012Updated 14 years ago