gabriel-tenma-white / sdr5
Design files for sdr5 prototype (Zynq + AD9363)
☆96Updated 5 years ago
Alternatives and similar repositories for sdr5:
Users that are interested in sdr5 are comparing it to the libraries listed below
- AD9361 based USB3 SDR☆101Updated 7 years ago
- EagleSDR Pi is a single board SDR Pplatform. It includes a Xilinx Zynq-7020, AD9363/AD9361/AD9364, 512 MByte DDR3L memory, USB OTG port, …☆77Updated 3 years ago
- Vivado and PetaLinux projects for Zynq EBAZ4205 Board☆78Updated 3 years ago
- EBAZ4205 is Xilinx Zynq based mining board used in Ebang Ebit E9+ bitcoin miner machine.☆68Updated 11 months ago
- Minimal SDR with Lattice MachXO2 FPGA. And a port to Cyclone3 by Steven Groom☆103Updated 4 years ago
- 4 port eCal module☆74Updated this week
- FTDI EEPROM dumps for common JTAG FPGA programmers☆75Updated last year
- AD936x+7Z020+USB HS dongle, In development...☆50Updated 2 years ago
- Xilinx Virtual Cable Server for Raspberry Pi☆110Updated 2 years ago
- 1MHz to 6GHz USB based vector network analyzer☆136Updated 4 years ago
- ☆47Updated 3 years ago
- A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm☆109Updated 4 years ago
- Digilent JTAG clone hardware + eeprom firmware (.bin)☆61Updated 2 years ago
- PYNQ-Z1 + AD936X openwifi capable SDR platform☆83Updated 2 years ago
- ZYNQ-IPMC Hardware☆17Updated 2 years ago
- FPGA core boards / evaluation boards based on CDCTL hardware☆90Updated 3 years ago
- Wireless JTAG 'cable' for Xilinx FPGAs. This is an 'English fork' of https://github.com/ciniml/xvc-esp32 project.☆97Updated 3 years ago
- 5MHz to 2.1GHz RF Synthesizer with modulation capability☆42Updated 2 years ago
- Use Raspberry Pi as a wireless Xilinx JTAG 'cable'. Note: This is a portable, tested, maintained clone of https://github.com/strongleg/xv…☆35Updated 3 years ago
- USB3 PIPE interface for Xilinx 7-Series☆209Updated 2 years ago
- Source code of MIPI DSI Bridge Published on https://www.circuitvalley.com☆105Updated 10 months ago
- Xilinx Virtual Cable Daemon☆113Updated 3 years ago
- A far more light version anlogic-jtag cable with some enhanced functions.☆47Updated 5 months ago
- ANTSDR Firmware☆135Updated last year
- Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components☆60Updated 2 years ago
- Simple mono FM Radio.☆46Updated 8 years ago
- ☆76Updated 5 years ago
- Over-engineered SDR development board☆36Updated 2 months ago
- Prototype time domain reflectometer/sampling oscilloscope☆50Updated 5 years ago
- 0 - 32 MHz full spectrum and SDR Receiver with a very cheap FPGA board☆23Updated 6 months ago