cyjseagull / hybrid-memory-simulator
hybrid memory simulator consists of MarssX86,DRAMSim2, NVMain and Hybridsim. This simulator has already provided interface to plugin DRAMSim2/NVMain/Hybridsim as the main memory and a patch related to the interface . You can use the simulator to simulate hybrid memory system.
☆22Updated 9 years ago
Alternatives and similar repositories for hybrid-memory-simulator:
Users that are interested in hybrid-memory-simulator are comparing it to the libraries listed below
- This is a fork of zsim (see https://github.com/s5z/zsim) which integrates the NVMain main memory simulator, adding 3D stacking and non-vo…☆25Updated 10 years ago
- gem5-nvmain hybrid simulator supporting simulation of DRAM-NVM hybrid memory system☆75Updated 5 years ago
- Simulator of a memory controller to connect DRAMSim and FlashDIMMSim into one unified memory☆17Updated 9 months ago
- A Multiplatform benchmark designed to provide holistic, detailed and close-to-hardware view of memory system performance with family of b…☆21Updated last month
- VANS: A validated NVRAM simulator☆26Updated last year
- This is the respository that holds the artifacts of MICRO'23 -- Demystifying CXL Memory with True CXL-Ready Systems and CXL Memory Device…☆43Updated 10 months ago
- CXL-DMSim: A Full-System CXL Disaggregated Memory Simulator Based on gem5☆45Updated 2 months ago
- Modifications to GEM5 for running kernel bypass networking. (DPDK)☆15Updated last year
- ☆18Updated 2 years ago
- Victima is a new software-transparent technique that greatly extends the address translation reach of modern processors by leveraging the…☆25Updated last year
- This is a processing-in-memory simulator which models 3D-stacked memory within gem5. Also includes the workloads used for IMPICA (In-Memo…☆44Updated 7 years ago
- ☆23Updated last year
- SHMA: Software-managed Caching for Hybrid DRAM/NVM Memory Architectures, implemented with zsim and nvmain hybrid simulators☆60Updated 7 years ago
- An FPGA-based full-stack in-storage computing system.☆36Updated 4 years ago
- This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews shoul…☆29Updated 6 months ago
- This is where gem5 based DRAM cache models live.☆15Updated last year
- A Cycle-level simulator for M2NDP☆22Updated last month
- ☆13Updated 9 years ago
- A fast, accurate, and easy-to-integrate memory simulator that model memory system performance with bandwidth--latency curves.☆19Updated last month
- The Artifact of NeoMem: Hardware/Software Co-Design for CXL-Native Memory Tiering☆39Updated 5 months ago
- ☆66Updated last year
- This repository contains an extended version of SMCSim (originally by Erfan Azarkhish), used for near-data-processing research by Jiwon C…☆14Updated 4 years ago
- Adapting gem5 output to McPAT input☆9Updated 8 years ago
- HSCC is implemented with zsim-nvmain hybrid simulator, it has achieved the following functions: (1) Memory management simulations (such a…☆53Updated 3 years ago
- ☆29Updated 3 years ago
- NVMain - An Architectural Level Main Memory Simulator for Emerging Non-Volatile Memories☆78Updated 5 years ago
- ☆67Updated 4 years ago
- A cache simulator designed to be used with memory access traces obtained from Pin (www.pintool.org)☆23Updated 6 years ago
- The Artifact Evaluation Version of SOSP Paper #19☆42Updated 5 months ago
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆51Updated 3 years ago