abarajithan11 / cocotb-exampleLinks
☆11Updated 3 years ago
Alternatives and similar repositories for cocotb-example
Users that are interested in cocotb-example are comparing it to the libraries listed below
Sorting:
- Repository gathering basic modules for CDC purpose☆54Updated 5 years ago
- Implementation of the pipelined RISC V processor with many useful features as fully bypassing, dynamic branch prediction, single and mult…☆14Updated last year
- SystemVerilog examples and projects☆18Updated last month
- Complete tutorial code.☆21Updated last year
- Accelerating the AES algorithm on an FPGA and comparing the speedup with both AES and Modified AES algorithms☆27Updated 3 years ago
- Xilinx AXI VIP example of use☆41Updated 4 years ago
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆73Updated 4 years ago
- Python Tool for UVM Testbench Generation☆53Updated last year
- An open source, parameterized SystemVerilog digital hardware IP library☆27Updated last year
- SystemVerilog Direct Programming Interface (DPI) Tutorial☆65Updated 4 years ago
- Structured UVM Course☆44Updated last year
- Design and UVM-TB of RISC -V Microprocessor☆23Updated last year
- Ethernet interface modules for Cocotb☆67Updated last year
- This repo is created to include illustrative examples on object oriented design pattern in SV☆58Updated 2 years ago
- General Purpose AXI Direct Memory Access☆53Updated last year
- Tranining Completion Project : : Verification of AXI Direct Memory Access (DMA) using UVM☆33Updated this week
- An example Python-based MDV testbench for apbi2c core☆30Updated 11 months ago
- ☆34Updated 6 years ago
- A SytemVerilog implementation of Cyclic Redundancy Check runs at up to Terabits per second☆16Updated last year
- VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.☆43Updated 3 years ago
- ☆33Updated last month
- ☆24Updated 8 months ago
- Developed with the aim of providing engineers and designers with a centralized resource, this repository serves as a valuable reference f…☆61Updated last year
- Parameterised Asynchronous AHB3-Lite to APB4 Bridge.☆44Updated last year
- IEEE Executive project for the year 2021-2022☆9Updated 2 years ago
- Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).☆58Updated this week
- Verilog Design, Simulation & Synthesis of Digital ASIC Projects☆15Updated 2 years ago
- SystemVerilog modules and classes commonly used for verification☆50Updated 6 months ago
- UART models for cocotb☆29Updated 2 years ago
- Verilog RTL Design☆43Updated 3 years ago