☆35May 25, 2026Updated 2 months ago
Alternatives and similar repositories for OpenRVGPUCourse
Users that are interested in OpenRVGPUCourse are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆20Jun 16, 2025Updated last year
- ☆19Jan 13, 2026Updated 7 months ago
- Open source process design kit for 28nm open process☆90Apr 23, 2024Updated 2 years ago
- Open stadard cell library for open 28nm process☆17Jul 5, 2023Updated 3 years ago
- PYNQ for Zybo board☆15Jan 30, 2026Updated 6 months ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Synthesisable SIMT-style RISC-V GPGPU☆57Mar 30, 2026Updated 4 months ago
- A docker image for One Student One Chip's debug exam☆10Sep 22, 2023Updated 2 years ago
- RISC-V SIMD Superscalar Dual-Issue Processor☆31Apr 24, 2025Updated last year
- ☆24Mar 19, 2026Updated 4 months ago
- Fibertree emulator☆17Nov 4, 2024Updated last year
- An Open-Source Processor for Accelerating Spiking Neural Network☆14Sep 30, 2022Updated 3 years ago
- Ventus GPGPU develop environment☆17Updated this week
- Implementation of NM sparsity recipe presented in the paper "Progressive Gradient Flow for Robust N:M Sparsity Training in Transformers".☆11Feb 5, 2024Updated 2 years ago
- 大三上做的本科毕设，包含BNN的替代梯度训练，verilog电路实现，完成180nm工艺流片。☆27Jun 30, 2025Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Docker Development Environment for SpinalHDL☆20Aug 8, 2024Updated 2 years ago
- Summary of bugs in Xuantie C9XX core design. include C906/C908/C910/C920☆36Jun 1, 2026Updated 2 months ago
- CORDIC VLSI-IP for deep learning activation functions☆15Jul 13, 2019Updated 7 years ago
- A tiny Verilog CNN accelerator for the Tang Nano 20K. Features INT8 quantized weights, a streaming MAC array, and full on-chip MNIST infe…☆17May 26, 2026Updated 2 months ago
- sram/rram/mram.. compiler☆55Sep 11, 2023Updated 2 years ago
- ☆22Nov 25, 2023Updated 2 years ago
- ☆18Nov 10, 2025Updated 9 months ago
- MIPS Processor, BNN Accelerator, AXI4 interface, Cache Controller and LRU replacement☆16Nov 4, 2022Updated 3 years ago
- Source code for LEF/DEF☆11Oct 16, 2018Updated 7 years ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- High-Throughput, Cost-Effective Billion-Scale Vector Search with a Single GPU [SIGMOD'26]☆30Apr 22, 2026Updated 3 months ago
- A fault-tolerant RDMA-based disaggregated key-value store with 1-RTT UPDATEs and GETs thanks to the SWARM replication protocol☆14Sep 25, 2024Updated last year
- ☆19Nov 11, 2024Updated last year
- ☆27Aug 2, 2021Updated 5 years ago
- IPv4/UDP stack written in VHDL code, for interfacing with an FPGA over Ethernet☆11Jun 2, 2021Updated 5 years ago
- Minimal FPGA hardware/software co-design demo with UART protocol, scratchpad memory, and an int8 dot-product accelerator, plus Python/C++…☆28May 12, 2026Updated 3 months ago
- The MATLAB Tensor Core: a set of models of tensor cores written in MATLAB☆19Updated this week
- Deduplication over dis-aggregated memory for Serverless Computing☆14Mar 21, 2022Updated 4 years ago
- RTL code for AXI4 Interconnect (Verilog). Supports weighted round-robin arbitration, n-channel master, 4Kb splitting, reorder transaction…☆36Mar 13, 2025Updated last year
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- core placement optimization☆13Dec 25, 2021Updated 4 years ago
- A Verilog Filelist parser in Rust☆11Mar 25, 2022Updated 4 years ago
- ☆12Mar 22, 2022Updated 4 years ago
- This project is to list the best books, courses, tutorial, methods on learning certain knowledge☆11Mar 22, 2021Updated 5 years ago
- discrete gate sizing☆14Nov 23, 2020Updated 5 years ago
- Open source RTL implementation of Tensor Core, Sparse Tensor Core, BitWave and SparSynergy in the article: "SparSynergy: Unlocking Flexib…☆26Mar 29, 2025Updated last year
- RV64GC Linux Capable RISC-V Core☆67Updated this week