FPGA-based Nintendo Entertainment System Emulator
☆273Jan 16, 2024Updated 2 years ago
Alternatives and similar repositories for fpga_nes
Users that are interested in fpga_nes are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- NES in Verilog☆208Aug 8, 2025Updated last year
- An FPGA based handheld NES system built around the Spartan 6 and the Spartan Mini development board.☆33Aug 20, 2025Updated last year
- Recreating an NES in verilog☆13Aug 29, 2024Updated 2 years ago
- An NES emulator on a Cyclone IV FPGA.☆16Nov 20, 2014Updated 11 years ago
- ☆18Mar 23, 2020Updated 6 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- ☆27May 3, 2020Updated 6 years ago
- NESTang is an FPGA Nintendo Entertainment System implemented with Sipeed Tang Primer 25K, Nano 20K and Primer 20K boards☆455Jun 20, 2025Updated last year
- A Verilog HDL model of the MOS 6502 CPU☆389Apr 8, 2023Updated 3 years ago
- IBM PC Compatible SoC for a commercially available FPGA board☆78Oct 26, 2016Updated 9 years ago
- Implementation Nintendo's GameBoy console on an FPGA☆99Sep 10, 2016Updated 10 years ago
- ☆205Sep 30, 2026Updated 2 weeks ago
- Verilog VGA font generator 8 by 16 pixels☆16Mar 30, 2022Updated 4 years ago
- SNES FPGA Emulator☆92Nov 19, 2018Updated 7 years ago
- sn76489an compatible Verilog core, with emphasis on FPGA implementation and Megadrive/Master System compatibility☆34Jan 6, 2025Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- The Original Nintendo Gameboy in Verilog☆62Dec 12, 2014Updated 11 years ago
- Small python util to checkout a FATX partition☆11Jun 25, 2020Updated 6 years ago
- A ZipCPU demonstration port for the icoboard☆19Oct 21, 2021Updated 4 years ago
- Compact FPGA game console☆168Nov 14, 2023Updated 2 years ago
- A wishbone controlled PWM (audio) controller☆19Jan 16, 2024Updated 2 years ago
- A 32-bit MIPS / RISC-V core & SoC, 1.55 DMIPS/MHz, 2.96 CM/Mhz☆426Updated this week
- IP cores for the FPGA Libre project☆12Aug 7, 2017Updated 9 years ago
- Reverse engineered SystemVerilog RTL version of the Yamaha OPL3 (YMF262) FM Synthesizer☆409Oct 2, 2025Updated last year
- A Pi emulating a GameBoy sounds cheap. What about an FPGA?☆548Dec 10, 2022Updated 3 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- SNES for MiSTer☆17Sep 5, 2025Updated last year
- A Simple FPGA Implementation of the Nintendo Entertainment System☆33Oct 28, 2018Updated 7 years ago
- MicroPython - legacy branch contain old experiments, and experimental for new work☆33Sep 6, 2021Updated 5 years ago
- Open source MPSoC running 620 MIPS (CHStone) of RISC-V (RV32iMC) programms on the ARTY board (XC7A35T).☆22Dec 20, 2019Updated 6 years ago
- NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board☆42Jan 11, 2026Updated 9 months ago
- FPGA 8-Bit TV80 SoC for Lattice iCE40 with complete open-source toolchain flow using yosys and SDCC☆59Feb 3, 2023Updated 3 years ago
- Everything to do with the XuLA2 FPGA board: schematics, layout, firmware, example FPGA designs, documentation, etc.☆55Jul 4, 2015Updated 11 years ago
- LatticeMico32 soft processor☆105Oct 10, 2014Updated 12 years ago
- SoC design for Milkymist One - LM32, DDR SDRAM, 2D TMU, PFPU☆156Feb 18, 2014Updated 12 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- A version of f32c/arduino that works with the SpinalHDL Vexriscv Murax SoC☆15May 23, 2019Updated 7 years ago
- This is a repo containing ARM-Cortex-M0 based SOC designs implemented on the Nexus-4-DDR , Nexus-4 and the ARTY - A7 FPGA platforms.☆12Sep 6, 2023Updated 3 years ago
- A tiny POWER Open ISA soft processor written in Chisel☆117Feb 13, 2023Updated 3 years ago
- FPGA Tools and Library☆48May 1, 2023Updated 3 years ago
- Send video/audio over HDMI on an FPGA☆1,302Jul 13, 2026Updated 3 months ago
- A multiply core generator☆16Jun 25, 2020Updated 6 years ago
- Programmable Arcade Circuit Emulation☆15Oct 14, 2017Updated 9 years ago