VIA-Research / LazyDPLinks
Open-source of LazyDP published in ASPLOS-2024
☆22Updated last year
Alternatives and similar repositories for LazyDP
Users that are interested in LazyDP are comparing it to the libraries listed below
Sorting:
- ☆26Updated last month
- ☆165Updated last year
- ☆21Updated 2 months ago
- A Cycle-level simulator for M2NDP☆32Updated 5 months ago
- Artifact for paper "PIM is All You Need: A CXL-Enabled GPU-Free System for LLM Inference", ASPLOS 2025☆122Updated 8 months ago
- NeuPIMs: NPU-PIM Heterogeneous Acceleration for Batched LLM Inferencing☆109Updated last year
- ☆126Updated last year
- Processing-In-Memory (PIM) Simulator☆221Updated last year
- PIM-DL: Expanding the Applicability of Commodity DRAM-PIMs for Deep Learning via Algorithm-System Co-Optimization☆35Updated last year
- The Artifact of NeoMem: Hardware/Software Co-Design for CXL-Native Memory Tiering☆63Updated last year
- ☆11Updated last year
- ☆70Updated 5 years ago
- UPMEM LLM Framework allows profiling PyTorch layers and functions and simulate those layers/functions with a given hardware profile.☆37Updated 5 months ago
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆56Updated 4 years ago
- ☆31Updated 3 months ago
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆70Updated last month
- ☆28Updated last year
- A simulator for SK hynix AiM PIM architecture based on Ramulator 2.0☆54Updated 6 months ago
- ☆19Updated 2 years ago
- ☆26Updated 2 years ago
- HyFiSS: A Hybrid Fidelity Stall-Aware Simulator for GPGPUs☆39Updated last year
- Artifact material for [HPCA 2025] #2108 "UniNDP: A Unified Compilation and Simulation Tool for Near DRAM Processing Architectures"☆53Updated 5 months ago
- This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews shoul…☆38Updated last year
- LLMServingSim: A HW/SW Co-Simulation Infrastructure for LLM Inference Serving at Scale☆177Updated 6 months ago
- ☆81Updated 5 years ago
- PIMeval simulator and PIMbench suite☆44Updated 2 months ago
- A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combi…☆180Updated 3 years ago
- The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow☆46Updated 3 years ago
- DAMOV is a benchmark suite and a methodical framework targeting the study of data movement bottlenecks in modern applications. It is inte…☆84Updated 2 years ago
- A fast, accurate, and easy-to-integrate memory simulator that model memory system performance with bandwidth--latency curves.☆32Updated 3 months ago