H2020-COSSIM / cMcPATView external linksLinks
A modified version of McPAT for the COSSIM framework. The code is based on McPAT v1.3 and integrates with cgem5.
☆18Mar 21, 2022Updated 3 years ago
Alternatives and similar repositories for cMcPAT
Users that are interested in cMcPAT are comparing it to the libraries listed below
Sorting:
- A RISC-V BOOM Microarchitecture Power Modeling Framework☆31May 12, 2023Updated 2 years ago
- Source code for DESTINY, a tool for modeling 2D and 3D caches designed with SRAM, eDRAM, STT-RAM, ReRAM and PCM. This is mirror of follow…☆26Dec 18, 2024Updated last year
- Benchmarks of Deep Neural Networks☆39May 19, 2021Updated 4 years ago
- Releasing open-sourced version of the code used in the paper "Perceptron-based Prefetch Filtering (ISCA 2019)"☆10May 27, 2022Updated 3 years ago
- A parser for PTX 6.5☆13Jun 19, 2023Updated 2 years ago
- test images with not appropriate labels in MNIST dataset☆10Mar 3, 2018Updated 7 years ago
- A static site generator for photoessays.☆10Aug 10, 2017Updated 8 years ago
- ☆12Sep 18, 2024Updated last year
- ☆11Jun 9, 2023Updated 2 years ago
- Energy Consumption-Aware Tabular Benchmark For Neural Architecture Search☆11Aug 18, 2025Updated 5 months ago
- Iodine: Verifying Constant-Time Execution of Hardware☆15Mar 29, 2021Updated 4 years ago
- verilog实现systolic array及配套IO☆12Dec 2, 2024Updated last year
- Example of Chisel3 Diplomacy☆11Feb 23, 2022Updated 3 years ago
- [AAAI-25 Oral] Adaptive Calibration☆14Jul 6, 2025Updated 7 months ago
- Parse objdump files using tree-sitter☆12Nov 22, 2023Updated 2 years ago
- Data-centric defense mechanism against Spectre attacks. (DAC'19)☆11Nov 6, 2019Updated 6 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆11Jan 27, 2022Updated 4 years ago
- Minimal RISC-V Chisel design strictly reflecting the ISA document for verification.☆18Feb 3, 2026Updated last week
- All the verilog code I wrote in hardware Course☆10Sep 22, 2019Updated 6 years ago
- (elastic) cuckoo hashing☆15Jun 20, 2020Updated 5 years ago
- HLS project modeling various sparse accelerators.☆12Jan 11, 2022Updated 4 years ago
- Creating beautiful gem5 simulations☆49Mar 22, 2021Updated 4 years ago
- gem5 configuration for intel's skylake micro-architecture☆53Jan 6, 2022Updated 4 years ago
- Opportunistic Protocol Simulator☆14Oct 17, 2023Updated 2 years ago
- MESIF cache coherency protocol for the GEM5 simulator☆15Jun 2, 2016Updated 9 years ago
- A word-aligned integer compression algorithm.☆13Jul 8, 2024Updated last year
- ☆13Jun 22, 2019Updated 6 years ago
- gem5 相关中文笔记☆17Dec 2, 2021Updated 4 years ago
- C++ SystemC Implementation of a Systolic Array☆14May 15, 2020Updated 5 years ago
- This repository contains some tools to monitor the UNC_CBO_CACHE_LOOKUP event of the C-Boxes.☆12Oct 11, 2017Updated 8 years ago
- A C implementation of AES got from OpenSSL☆14Dec 19, 2011Updated 14 years ago
- Official repository of the Arm Research Starter Kit on System Modeling using gem5☆118Jun 13, 2025Updated 8 months ago
- Memory Tagging ISA extension that can be used by software to enforce memory tag checks on memory loads and stores☆26Dec 18, 2025Updated last month
- Python module containing verilog files for rocket cpu (for use with LiteX).☆14Jan 16, 2026Updated 3 weeks ago
- 北京理工大学软件工程大二小学期Web开发基础(互联网应用开发基础训练)大作业,By 光圈科技爱猫TV☆17Mar 20, 2025Updated 10 months ago
- About the source code of "Merging Similar Patterns for Hardware Prefetching" paper, which is accepted in MICRO 2022.☆14Mar 1, 2023Updated 2 years ago
- Reduce the environmental footprint of your Python software programs☆16Feb 7, 2026Updated last week
- Gem5 implementation of "InvisiSpec", a defense mechanism of speculative execution attacks on cache hierarchy.☆61Apr 27, 2020Updated 5 years ago
- 算法工程师 从零到一 https://dongfengchi.github.io/algo_engineer_zero_to_one/☆15Mar 9, 2021Updated 4 years ago