Gigantua / EspressoLinks
Espresso heuristic logic minimizer made C++20 Windows 10 compatible - University of California, Berkeley
☆54Updated last year
Alternatives and similar repositories for Espresso
Users that are interested in Espresso are comparing it to the libraries listed below
Sorting:
- A modern (2017) compilable re-host of the Espresso heuristic logic minimizer.☆153Updated 5 years ago
- A Parallel SAT Solver with GPU Accelerated Inprocessing☆123Updated last month
- C++ truth table library☆59Updated 2 weeks ago
- E-morphic: Scalable Equality Saturation for Structural Exploration in Logic Synthesis (DAC2025)☆20Updated last month
- Implementation of Espresso-II method for heuristic minimization of single output boolean functions☆28Updated last year
- Reads a state transition system and performs property checking☆84Updated 5 months ago
- A circuit toolkit☆103Updated 5 years ago
- Bitwuzla is a Satisfiability Modulo Theories (SMT) solver for the theories of fixed-size bit-vectors, floating-point arithmetic, arrays a…☆270Updated this week
- The HW-CBMC and EBMC Model Checkers for Verilog☆81Updated this week
- Hardware Formal Verification Tool☆62Updated last month
- CoreIR Symbolic Analyzer☆73Updated 4 years ago
- A generic parser and tool package for the BTOR2 format.☆41Updated 3 months ago
- Pono: A flexible and extensible SMT-based model checker☆106Updated last week
- CUDD Decision Diagram Package☆140Updated last week
- A Satisfiability Modulo Theories (SMT) solver for the theories of fixed-size bit-vectors, arrays and uninterpreted functions.☆352Updated 11 months ago
- AIGER And-Inverter-Graph Library☆86Updated last week
- Sail version of Arm ISA definition, currently for Armv9.3-A, and with the previous Sail Armv8.5-A model☆86Updated last month
- Lingeling SAT Solver☆103Updated last year
- A generic C++ API for SMT solving. It provides abstract classes which can be implemented by different SMT solvers.☆126Updated this week
- ☆34Updated 2 weeks ago
- Niklas Een's ABC/ZZ framework☆23Updated 3 years ago
- UCLID5: formal modeling, verification, and synthesis of computational systems☆148Updated last month
- The glucose SAT solver☆120Updated 2 months ago
- Multi-core Decision Diagram (BDD/LDD) implementation☆44Updated last year
- BTOR2 MLIR project☆26Updated last year
- Integer Multiplier Generator for Verilog☆23Updated last month
- ☆48Updated last year
- Structured BVA☆38Updated last year
- A (concrete or symbolic) implementation of IEEE-754 / SMT-LIB floating-point☆40Updated 5 months ago
- This repository contains the code of Intel(R) SAT Solver (IntelSAT)☆32Updated 4 months ago