Inference Engine for SiliconMind-V1 Verilog Coding Models
☆52Jun 2, 2026Updated 4 months ago
Alternatives and similar repositories for SiliconMind-V1
Users that are interested in SiliconMind-V1 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- AI-Powered Hardware Design & Verification Copilot - Plugin for your CLI☆22Jul 12, 2026Updated 2 months ago
- 簡韶逸老師的"電腦視覺"作業與專題(CV)☆24Jan 18, 2024Updated 2 years ago
- Computer-Aided VLSI System Design☆26Oct 24, 2024Updated last year
- Contract-Aware RTL Code Generation Agents with Temporal Tracing, Slicing and Formal Verification☆26Jan 28, 2026Updated 8 months ago
- ☆58Jan 6, 2026Updated 8 months ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Cluster-level matrix unit integration into GPUs, implemented in Chipyard SoC☆62Jan 20, 2026Updated 8 months ago
- IC Contest☆47Mar 28, 2023Updated 3 years ago
- ☆39Sep 17, 2024Updated 2 years ago
- MAGE: A Multi-Agent Engine for Automated RTL Code Generation☆140Apr 11, 2025Updated last year
- ☆30Aug 18, 2025Updated last year
- LLM Agent for Hardware Description Language☆24Jun 7, 2025Updated last year
- Professor: C.H. Yang☆10Aug 16, 2025Updated last year
- Hand Writing Digital Recognization Based on FPGA, we desiged a SoC embeded a Cortex M3 core and other peripherals，this SoC run a CNN. The…☆14Mar 30, 2023Updated 3 years ago
- I independently completed all five labs and wrote additional notes for Labs 1, 2, 3, and 5.☆27Oct 14, 2025Updated 11 months ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- RISC-V vector and tensor compute extensions for Vortex GPGPU acceleration for ML workloads. Optimized for transformer models, CNNs, and g…☆25Apr 25, 2025Updated last year
- ☆17Mar 23, 2026Updated 6 months ago
- ☆54Jul 18, 2024Updated 2 years ago
- Instruction and files for porting Arm DesignStart to CW305.☆17Dec 6, 2023Updated 2 years ago
- ☆16Feb 18, 2024Updated 2 years ago
- [ICLR'25 Spotlight] Rethinking and improving autoformalization: towards a faithful metric and a Dependency Retrieval-based approach☆30May 20, 2025Updated last year
- The code about TC-Bench and CircuitMind☆18Jun 7, 2025Updated last year
- 丁建均老師的"時頻分析和小波轉換"作業(TFW)☆14Jan 18, 2024Updated 2 years ago
- wavedrom to verilog converter☆18Sep 14, 2021Updated 5 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Random Generator of Btor2 Files☆10Sep 2, 2023Updated 3 years ago
- 國立陽明交通大學 電子所 積體電路設計實驗 李鎮宜教授☆15Mar 3, 2023Updated 3 years ago
- Connecting bv_decide to SMTLIB.☆19Updated this week
- [IJCAI 2024] QiMeng-CPU-v1: Automated CPU Design by Learning from Input-Output Examples☆35May 4, 2025Updated last year
- [ICLR 2024]: Is Self-Repair a Silver Bullet for Code Generation?☆15May 2, 2024Updated 2 years ago
- Agent skill for AMD/Xilinx Vitis HLS generation and FPGA design workflows.☆30Aug 14, 2026Updated last month
- ☆13Jan 13, 2026Updated 8 months ago
- LlamaIndex Powered RAG for PDF, TXT and DOCX files with Tesseract OCR support, Semantic chunking, Document citations with direct page dis…☆18Dec 7, 2025Updated 9 months ago
- ☆54Dec 10, 2024Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Official code implementation for "BoostMVSNeRFs: Boosting MVS-based NeRFs to Generalizable View Synthesis in Large-scale Scenes" [SIGGRAP…☆28Jul 23, 2024Updated 2 years ago
- a Computing In Memory emULATOR framework☆16May 19, 2024Updated 2 years ago
- [DATE 2025] haven: hallucination-mitigated llm for verilog code generation aligned with hdl engineers☆44Jul 9, 2025Updated last year
- ☆16May 6, 2026Updated 4 months ago
- Equivalence checking with Yosys☆65Sep 16, 2026Updated 2 weeks ago
- SAT solvers from Knuth's The Art of Computer Programming, Vol. 4B☆10Sep 25, 2026Updated last week
- A carrier board for the ssd2828 and the LH154Q01 & VS035ZSM lcd panels☆22Dec 15, 2024Updated last year