A fork of TinyMLPerf modified to use our of TensorFlow Lite for Microcontrollers utilises a part of the RISC-V Vector Extension to improve performance.
☆11Jan 18, 2021Updated 5 years ago
Alternatives and similar repositories for tinymlperf
Users that are interested in tinymlperf are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Simulations and designs for bit serial ALU implemented in TTL circuitry. Also bit serial cpu architectures - all simulated using H. Neem…☆12Aug 26, 2022Updated 4 years ago
- Drive a Wishbone master bus with an SPI bus.☆10Apr 24, 2025Updated last year
- Harsh Environment CubeSat Payload designed to evaluate three different manufacturing nodes SDR SDRAM technologies under space radiation c…☆18Sep 7, 2021Updated 5 years ago
- ☆13Jan 17, 2022Updated 4 years ago
- HARV - HArdened Risc-V☆20Mar 10, 2022Updated 4 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Core protocol to AXI bridge☆11Sep 30, 2019Updated 7 years ago
- Capacitated VRP using Gurobi☆13Jul 30, 2017Updated 9 years ago
- Prize-Collecting Traveling Salesman Problem with Time Windows☆15Nov 8, 2020Updated 6 years ago
- code and data for C&OR paper 'a GRL framework for neural ALNS'☆12Mar 5, 2025Updated last year
- Server-side Authentication using Cookies with Firebase Admin SDK☆27Aug 19, 2024Updated 2 years ago
- A resource-efficient VHDL-based framework for deploying CNNs and Feedforward Networks on FPGAs, featuring core modules, MNIST examples, a…☆17Mar 10, 2026Updated 7 months ago
- Notes from learning RISC-V☆12Jun 30, 2026Updated 4 months ago
- This repo is for ASPLOS 2025 artifact evaluation☆13Oct 3, 2026Updated last month
- Implementation of a circular queue in hardware using verilog.☆18Mar 22, 2019Updated 7 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- [TUD AE4441] Solving The Vehicle Routing Problem With Time Windows Using GurobiPy☆17Dec 2, 2022Updated 3 years ago
- rv6 is a kernel & operating system written entirely in rust.☆11Nov 7, 2019Updated 7 years ago
- ☆18Oct 6, 2025Updated last year
- CVRP truck planner in Gurobi.☆20Jan 18, 2016Updated 10 years ago
- A set of Wishbone Controlled SPI Flash Controllers☆107Oct 31, 2022Updated 4 years ago
- 基于FP16的二维脉动阵列电路设计☆13Feb 23, 2023Updated 3 years ago
- A min-sum LDPC decoder written in SystemVerilog (IEEE 1800-2012)☆12Jan 8, 2021Updated 5 years ago
- ☆10Nov 3, 2020Updated 6 years ago
- Formally proven secure design of the RISC-V core BOOM (Berkeley Out-of-Order Machine) w.r.t. transient execution attacks (e.g., Meltdown …☆15Jan 17, 2025Updated last year
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Various test models in WNNX format. It can view with `pip install wnetron && wnetron`☆12Jun 22, 2022Updated 4 years ago
- Microarchitectural control flow integrity (𝜇CFI) verification checks whether there exists a control or data flow from instruction's ope…☆16Jul 2, 2026Updated 4 months ago
- Hardware-assisted Dynamic Information Flow Tracking for Runtime Protection on RISC-V☆11Oct 16, 2023Updated 3 years ago
- Optimal facility location (Set Cover problem); setup costs and changeover times (traveling salesman problem) ; production and transportat…☆21Jul 9, 2018Updated 8 years ago
- ☆14Feb 18, 2021Updated 5 years ago
- A lightweight core for the CV32E40 implementing the RISC-V vector extension specification. (v0.8)☆35Jan 19, 2021Updated 5 years ago
- A single file C# file to untar file entries from a tar stream.☆18Mar 17, 2024Updated 2 years ago
- Playground for implementing LDPC codes on FPGA☆17Jan 1, 2023Updated 3 years ago
- Binary translation in Rust☆12Jun 22, 2020Updated 6 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Test suite containing a reproduction of all major transient-execution attacks in RISC-V and CHERI-RISC-V assembly☆17Jun 7, 2021Updated 5 years ago
- matlab code of ldpc☆15Oct 25, 2016Updated 10 years ago
- ☆46Oct 21, 2025Updated last year
- C rewrite of a minimal Python JPEG decoder☆12Jan 2, 2019Updated 7 years ago
- M-extension for RISC-V cores.☆33Nov 21, 2024Updated last year
- CassandraRestfulAPI project exposes the cassandra data tables with the help of Restful API's. The project follows the standard Restful AP…☆15Jul 8, 2017Updated 9 years ago
- This repository contains the verification suite for verifying Berkeley Out-of-Order Machine (BOOM) against transient execution attacks ba…☆24Mar 2, 2023Updated 3 years ago
Are these results useful?