thinkoco / c5soc_opencl
DE1SOC DE10-NANO DE10-Standard OpenCL hardware that support VGA and desktop. And Some applications such as usb camera YUYV to RGB , Sobel and so on.
☆90Updated 4 years ago
Related projects ⓘ
Alternatives and complementary repositories for c5soc_opencl
- Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design con…☆97Updated 6 years ago
- ☆82Updated 4 years ago
- This project is trying to create a base vitis platform to run with DPU☆47Updated 4 years ago
- SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials☆146Updated 4 years ago
- PYNQ, Neural network Language model, Overlay☆102Updated 5 years ago
- Premade bitstreams and block designs to complemented the PYNQ overlay tutorial☆39Updated 2 years ago
- Formerly known as the 'reVISION Getting Started Guide', the Embedded Reference Platforms User Guide covers the embedded vision reference …☆11Updated 8 months ago
- SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…☆98Updated 4 years ago
- ☆329Updated 4 years ago
- Raspberry Pi v2 camera (IMX219) to DisplayPort of Ultra96-V2 board through PL☆67Updated 2 years ago
- Caffe to VHDL☆66Updated 4 years ago
- Avnet Board Definition Files☆125Updated this week
- Matrix Operation Library for FPGA https://xilinx.github.io/gemx/☆63Updated 5 years ago
- First lesson for you to use DNNDK, also it can be helpful for your AI learning☆65Updated last year
- A convolutional neural network implemented in hardware (verilog)☆151Updated 7 years ago
- Board files to build Ultra 96 PYNQ image☆152Updated 2 months ago
- A discussion group on Open Source Deep Learning Accelerator, with technical reports and potential hardware/software issues.☆138Updated 7 years ago
- ☆116Updated 3 years ago
- Fixed Point Math Library for Verilog☆121Updated 10 years ago
- ☆116Updated this week
- A Tutorial on Putting High-Level Synthesis cores in PYNQ☆102Updated 6 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆173Updated 7 years ago
- ☆106Updated this week
- RISC-V Integration for PYNQ☆165Updated 5 years ago
- PYNQ Composabe Overlays☆67Updated 5 months ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆106Updated 7 years ago
- FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq Ultrascale+ MPSoC)☆128Updated last year
- ☆86Updated 4 years ago
- Computer Vision Overlays on Pynq☆174Updated 5 years ago
- FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud☆161Updated 2 years ago