rochus-keller / QtcVerilogLinks
This is a stand-alone Verilog IDE derived from a QtCreator 3.6.1 subset featuring the VerilogCreator plugin
☆21Updated 3 years ago
Alternatives and similar repositories for QtcVerilog
Users that are interested in QtcVerilog are comparing it to the libraries listed below
Sorting:
- IRSIM switch-level simulator for digital circuits☆35Updated 2 weeks ago
- This is the Verilog 2005 parser used by VerilogCreator☆15Updated 6 years ago
- 🔌 Compact JTAG ("cJTAG") to 4-wire JTAG (IEEE 1149.1) bridge.☆25Updated 3 years ago
- A plain VHDL implementation of a small microprocessor fully compatible with the ISA of the well known PicoBlaze by Ken Chapman.☆22Updated 4 years ago
- Flexible Byte transport protocol for bus bridging CPUs to FPGAs over UART,SPI,SERDES physical interfaces☆35Updated last year
- RISC-V RV64IS-compatible processor for the Kestrel-3☆21Updated 2 years ago
- LEON2 SPARC CPU IP core LGPL by Gaisler Research☆20Updated 12 years ago
- USB 1.1 Device IP Core☆21Updated 8 years ago
- Picorv32 SoC that uses only BRAM, not flash memory☆13Updated 7 years ago
- Small footprint and configurable Inter-Chip communication cores☆66Updated last month
- Simulation VCD waveform viewer, using old Motif UI☆27Updated 2 years ago
- An example OMI Device FPGA with 2 DDR4 memory ports☆19Updated 2 years ago
- Automated Git mirror of Gaisler's GRLIB/Leon3 releases☆20Updated 3 weeks ago
- FPGA assembler! Create bare-metal FPGA designs without Verilog or VHDL (Not to self: use Lisp next time)☆54Updated 4 years ago
- Digital Circuit rendering engine☆39Updated 4 months ago
- Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm☆34Updated 7 years ago
- ☆17Updated 2 years ago
- This repository contain source code for ngspice and ghdl integration☆33Updated 10 months ago
- ☆27Updated 6 years ago
- wavedrom to verilog converter☆16Updated 4 years ago
- Fully featured implementation of Inter-IC (I2C) bus master for FPGAs☆31Updated 5 years ago
- FPGA Development toolset☆20Updated 8 years ago
- Bit streams forthe Ulx3s ECP5 device☆18Updated 2 years ago
- Optimized RISC-V FP emulation for 32-bit processors☆36Updated 4 years ago
- Utilities for the ECP5 FPGA☆17Updated 4 years ago
- Repository containing the DSP gateware cores☆14Updated this week
- USB Full-Speed/Hi-Speed Device Controller core for FPGA☆32Updated 5 years ago
- A ZipCPU demonstration port for the icoboard☆19Updated 4 years ago
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆63Updated 6 years ago
- Time to Digital Converter (TDC)☆34Updated 4 years ago