rochus-keller / QtcVerilogLinks
This is a stand-alone Verilog IDE derived from a QtCreator 3.6.1 subset featuring the VerilogCreator plugin
☆21Updated 3 years ago
Alternatives and similar repositories for QtcVerilog
Users that are interested in QtcVerilog are comparing it to the libraries listed below
Sorting:
- IRSIM switch-level simulator for digital circuits☆35Updated last month
- This is the Verilog 2005 parser used by VerilogCreator☆15Updated 6 years ago
- LEON2 SPARC CPU IP core LGPL by Gaisler Research☆20Updated 12 years ago
- RISC-V RV64IS-compatible processor for the Kestrel-3☆21Updated 2 years ago
- Picorv32 SoC that uses only BRAM, not flash memory☆13Updated 7 years ago
- A plain VHDL implementation of a small microprocessor fully compatible with the ISA of the well known PicoBlaze by Ken Chapman.☆22Updated 4 years ago
- Flexible Byte transport protocol for bus bridging CPUs to FPGAs over UART,SPI,SERDES physical interfaces☆35Updated last year
- Automated Git mirror of Gaisler's GRLIB/Leon3 releases☆20Updated 2 months ago
- ☆17Updated 2 years ago
- ☆27Updated 6 years ago
- turbo 8051☆29Updated 8 years ago
- OSVVM UART Verification Components. Uart Transmitter with error injection for parity, stop, and break errors. UART Receiver verificati…☆13Updated this week
- USB 1.1 Device IP Core☆21Updated 8 years ago
- A RISC-V SBC based around the LambdaConcept USB2Sniffer FPGA board.☆30Updated 5 years ago
- Tools to convert Kicad intermediate netlist to HDL block diagram netlist☆12Updated 9 years ago
- Simplify VLSI (timing, power, noise, correlation, reliability) modeling and analysis with Characterization Description Format☆13Updated 5 years ago
- Optimized RISC-V FP emulation for 32-bit processors☆36Updated 4 years ago
- OSVVM project simulation scripts. Scripts are tedious. These scripts simplify the steps to compile your project for simulation☆14Updated this week
- WISHBONE Builder☆15Updated 9 years ago
- An assemble-it-yourself computer project board using a TinyFPGA B2 module at its heart.☆15Updated 8 years ago
- This repository contain source code for ngspice and ghdl integration☆33Updated last year
- The openMSP430 is a synthesizable 16bit microcontroller core written in Verilog.☆70Updated 7 years ago
- 1G eth UDP / IP Stack☆10Updated 11 years ago
- The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a…☆36Updated 5 years ago
- Reusable Verilog 2005 components for FPGA designs☆49Updated 3 weeks ago
- FPGA assembler! Create bare-metal FPGA designs without Verilog or VHDL (Not to self: use Lisp next time)☆54Updated 4 years ago
- ULX3S FPGA, RISC-V, ESP32 toolchain installer scripts☆39Updated 5 years ago
- EPWave -- The Free Interactive Browser-Based Wave Viewer☆14Updated 10 years ago
- Tools and Examples for IcoBoard☆80Updated 4 years ago
- Small footprint and configurable Inter-Chip communication cores☆66Updated 2 months ago