Alternatives and similar repositories for bust:

Users that are interested in bust are comparing it to the libraries listed below

• suoto / fpga_cores
  ☆32Updated last year
• VHDL / pyVHDLModel
  An abstract language model of VHDL written in Python.
  ☆50Updated this week
• OSVVM / OsvvmLibraries
  Start here. Includes all other OSVVM libraries as submodules: Utility, Common, Verification Component, and Script.
  ☆54Updated this week
• VHDL / news
  VHDL related news.
  ☆25Updated this week
• fransschreuder / xpm_vhdl
  A translation of the Xilinx XPM library to VHDL for simulation purposes
  ☆52Updated 4 months ago
• tmeissner / psl_with_ghdl
  Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
  ☆65Updated 2 weeks ago
• kevinpt / hdlparse
  Simple parser for extracting VHDL documentation
  ☆71Updated 7 months ago
• Paebbels / JSON-for-VHDL
  A JSON library implemented in VHDL.
  ☆77Updated 2 years ago
• VHDL / CoreLib
  A VHDL Core Library.
  ☆17Updated 7 years ago
• SystemRDL / PeakRDL-regblock
  Generate SystemVerilog RTL that implements a register block from compiled SystemRDL input.
  ☆55Updated 2 months ago
• wavedrom / cli
  CLI for WaveDrom
  ☆61Updated 11 months ago
• verilator / verilator-announce
  Announcements related to Verilator
  ☆39Updated 4 years ago
• SymbioticEDA / sva-demos
  SVA examples and demonstration
  ☆16Updated 4 years ago
• hdl-registers / hdl-registers
  An open-source HDL register code generator fast enough to run in real time.
  ☆44Updated this week
• rftafas / stdcores
  Standard and Curated cores, tested and working.
  ☆11Updated 2 years ago
• XedaHQ / xeda
  Cross EDA Abstraction and Automation
  ☆36Updated this week
• Nic30 / hwtLib
  hardware library for hwt (= ipcore repo)
  ☆35Updated 2 months ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆57Updated last year
• FPHDL / fphdl
  VHDL-2008 Support Library
  ☆57Updated 8 years ago
• VUnit / tdd-intro
  Example of Test Driven Design with VUnit
  ☆14Updated 3 years ago
• Paebbels / PicoBlaze-Library
  The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a…
  ☆35Updated 4 years ago
• hgomersall / Ovenbird
  A tool for merging the MyHDL workflow with Vivado
  ☆20Updated 4 years ago
• abs-tudelft / vhdeps
  VHDL dependency analyzer
  ☆23Updated 4 years ago
• ghdl / ghdl-cosim
  Documentation with code examples about interfacing VHDL with foreign languages and tools through GHDL
  ☆47Updated this week
• Paebbels / pyVHDLParser
  Streaming based VHDL parser.
  ☆81Updated 7 months ago
• slaclab / ruckus
  FPGA and Digital ASIC Build System
  ☆73Updated this week
• enjoy-digital / litejesd204b
  Small footprint and configurable JESD204B core
  ☆41Updated last month
• byuccl / tincr
  A Tcl-based CAD Tool Framework for Xilinx's Vivado Design Suite
  ☆39Updated 5 years ago
• tmeissner / formal_hw_verification
  Trying to verify Verilog/VHDL designs with formal methods and tools
  ☆41Updated 11 months ago
• paulscherrerinstitute / psi_common
  Common elements for FPGA Design (FIFOs, RAMs, etc.)
  ☆33Updated 3 weeks ago