michaelliao / learn-verilog
Learn Verilog
☆35Updated 2 years ago
Alternatives and similar repositories for learn-verilog:
Users that are interested in learn-verilog are comparing it to the libraries listed below
- An embed RISC-V Core with RV32IMZicsr ISA named SparrowRV.☆62Updated 2 years ago
- zqh_riscv is an open source SOC system based on riscv core and tilelink NOC bus. coding with PHGL language(python DSL language). this pro…☆37Updated 3 years ago
- An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器☆52Updated 9 months ago
- A 32-bit RISC-V SoC on FPGA that supports RT-Thread.☆28Updated last year
- 8051 core☆103Updated 10 years ago
- Cortex_m0软核源码,可以在FPGA上直接跑,包含UART、定时器这些外设,可以用keil写用户代码。可以看看《Cortex-M0 全可编程SoC原理及实现》这本书☆23Updated 4 years ago
- ☆62Updated 3 months ago
- 用Altera FPGA芯片自制CPU☆41Updated 10 years ago
- This ARMv4-compatible CPU core is written in synthesiable verilog.It could launch uCLinux and Linux in MODELSIM. It has high Dhrystone be…☆82Updated 4 years ago
- Peripheral Interface of FPGA☆35Updated 3 years ago
- a riscv32 rv32imc emulator written in c.☆33Updated 7 months ago
- 基于ALINX-AX7020平台的Linux驱动开发学习。☆47Updated 5 years ago
- Nuclei Board Labs☆58Updated last year
- 给定ARM Cortex-M3的软核,扩展周围的AMBA总线以及基本外设,完成在上面的汇编以及C语言的执行☆17Updated 5 years ago
- The next generation integrated development environment for processor design and verification. It has multi-hardware language support, o…☆103Updated 2 years ago
- 【例程】国产高云FPGA 开发板及其工程☆26Updated 6 months ago
- GoWin FPGA implement nes/fc☆14Updated last year
- turbo 8051☆29Updated 7 years ago
- PaserTech PaskiSoC 一个低成本的riscv soc实现, 支持32bit linux with mmu☆17Updated 2 years ago
- Reindeer Soft CPU for Step CYC10 FPGA board☆27Updated 4 years ago
- A 32bit RISC-V SoC on FPGA (EG4S20) that supports RT-Thread.☆12Updated 4 years ago
- Verilog极简教程☆36Updated 6 years ago
- As a salute to the guy who inspired me to become EE engineer. This is the RTL version of his homebrew CPU core (KC-LS1u)☆16Updated last year
- Cortex M0 based SoC☆72Updated 3 years ago
- ☆19Updated 4 years ago
- An FPGA-based QOI image compressor and decompressor in Verilog. 基于FPGA的QOI图像压缩器和解压器。☆24Updated 7 months ago
- Yet another free 8051 FPGA core☆33Updated 6 years ago
- a 4-pipeline riscv soc ( included core, periph), based with rv32im ,designed by verilog☆23Updated last year
- OpenMIPS——《自己动手写CPU》处理器部分☆22Updated 8 years ago
- ☆14Updated 7 years ago