Alternatives and similar repositories for human-detection-hog-svm

Users that are interested in human-detection-hog-svm are comparing it to the libraries listed below

• Verdvana / Async_FIFO
  位宽和深度可定制的异步FIFO
  ☆13Updated last year
• DeamonYang / FPGA_FFT
  基于FPGA的FFT
  ☆18Updated 6 years ago
• vfinotti / ahb3lite_dma
  DMA core compatible with AHB3-Lite
  ☆10Updated 6 years ago
• edwardclin2003 / LowPassFilterImageFPGA
  Verilog code that does 2D Low Pass Filter on a greyscale image
  ☆10Updated 9 years ago
• letitbe0201 / AXI-DMA-master-verification
  ☆25Updated 4 years ago
• fighter212 / ahb2apb
  this is an AHB to APB bridge with Synopsys VIP based test enviroment. RTL can be found from UVM website.
  ☆17Updated 10 years ago
• mfkiwl / E203_dma
  ☆10Updated 5 years ago
• wbbbbbb123 / Sram-controller-design-based-on-AHB-bus
  ☆20Updated 2 years ago
• zhangkunming0216 / FIFO_-asynchronous
  异步FIFO的内部实现
  ☆24Updated 6 years ago
• mhhai / ImageStitchBasedOnFPGA
  七路图像在FPGA中实现拼接，代码会不断添加进来。
  ☆25Updated 3 years ago
• yayouz / CNN-accelerator
  DMA controller for CNN accelerator
  ☆13Updated 8 years ago
• nguyenquanicd / AllArbiterRTLCode
  RTL code of some arbitration algorithm
  ☆14Updated 5 years ago
• srishis / DMA8237A_VERIF
  Verification of DMA Controller for 8086 Microprocessor Systems using OO Test bench
  ☆12Updated 5 years ago
• tom-urkin / AMBA
  AHB-lite, AHB-APB bridge and extended APB side architecture in SystemVerilog
  ☆14Updated last year
• canbozaci / Cache
  L1 Data, L1 Instruction and L2 Unified Cache Design FOR RV64IMC
  ☆13Updated 2 years ago
• Aperture-Electronic / Realtime-Bicubic-16X-SuperResolution-IP
  APV21B - Real-time Video 16X Bicubic Super-resolution IP, AXI4-Stream Video Interface Compatible, 4K 60FPS
  ☆22Updated 2 years ago
• eepro-bt / documents
  文档编写
  ☆13Updated 4 years ago
• kumarrishav14 / arm_watchdog
  Verification IP for Watchdog
  ☆11Updated 4 years ago
• Nitcloud / Image_sim
  基于FPGA的图像处理模块（出自于crazybingo）（将部分IP换为纯Verilog用于跨平台移植）
  ☆48Updated 5 years ago
• wanderingnail / AXI_DMA
  ☆20Updated 2 years ago
• fengyulin1996 / Verilog-DSP
  FIR，FFT based on Verilog
  ☆13Updated 7 years ago
• yuhsuan-t / NPU-Architecture
  CS533 Course Project (ongoing) - Exploring Parallel Architectures for Neural Processing Unit Implementations
  ☆19Updated 8 years ago
• shalan / MS_DMAC_AHBL
  A Direct Memory Access Controller (DMAC) with AHB-lite bus interface
  ☆13Updated 8 months ago
• wbbbbbb123 / UVM-based-AHB-bus-SRAM-controller-design-verification-platform-design
  ☆15Updated 2 years ago
• sandy2008 / CNN-FPGA
  ☆19Updated 6 years ago
• forever-gk / AHB-SystemVerilog
  ☆17Updated 10 years ago
• MaharshSuryawala / Image-Compression
  Modified the conventional JPEG compression algorithm with Lloyd-Max Quantizer. Implemented in MATLAB and tested on Xilinx Artix-7 FPGA.
  ☆16Updated 4 years ago
• Jon3Y / AMBA
  AHB/APB SRAM Inf, VCS&Verdi Sim.
  ☆14Updated 3 years ago
• visky2096 / AHB-to-I2C
  Attempt to setup a bridge between AHB and I2C by constructing dedicated modules of AHB master , AHB slave , APB master , APB slave, I2C m…
  ☆22Updated 6 years ago
• muneebullashariff / pulpino_soc_uvm_testbench
  UVM testbench for verifying the Pulpino SoC
  ☆13Updated 5 years ago