laurentiuduca / openveriflaLinks
☆20Updated last month
Alternatives and similar repositories for openverifla
Users that are interested in openverifla are comparing it to the libraries listed below
Sorting:
- DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.☆59Updated 2 years ago
- Portable HyperRAM controller☆58Updated 8 months ago
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆62Updated 6 years ago
- An open source FPGA PCI core & 8250-Compatible PCI UART core☆43Updated 4 years ago
- USB DFU bootloader gateware / firmware for FPGAs☆68Updated 10 months ago
- An open source PSRAM/HyperRAM controller for Sipeed Tang Nano 9K / Gowin GW1NR-LV9QN88PC6/15 FPGA☆79Updated 2 years ago
- Example Verilog code for Ulx3s☆41Updated 3 years ago
- ☆16Updated 5 years ago
- ECP5 FPGA in an "S7 Mini" form factor☆83Updated 4 years ago
- Basic USB 1.1 Host Controller for small FPGAs☆93Updated 5 years ago
- Miscellaneous ULX3S examples (advanced)☆78Updated 2 months ago
- New clean hdmi implementation for ulx3s, icestick, icoboard, arty7, colorlight i5 and blackicemx! With tmds encoding hacked down from dvi…☆104Updated last week
- IceCore Ice40 HX based modular core☆46Updated 4 years ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆38Updated last year
- AGM bitstream utilities and decoded files from Supra☆43Updated 3 weeks ago
- A compact USB HID host FPGA core supporting keyboards, mice and gamepads.☆134Updated 5 months ago
- Demo projects for various Kintex FPGA boards☆61Updated 3 months ago
- Nitro USB FPGA core☆87Updated last year
- Experimental FPGA project for streaming two MIPI CSI camera streams to an HDMI monitor using a ULX3S FPGA board☆30Updated 2 years ago
- Generic FPGA SDRAM controller, originally made for AS4C4M16SA☆80Updated 4 years ago
- Tiny tips for Colorlight i5 FPGA board☆57Updated 4 years ago
- ☆39Updated 3 years ago
- A complete HDMI transmitter implementation in VHDL☆22Updated 2 months ago
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆80Updated last year
- Fully featured implementation of Inter-IC (I2C) bus master for FPGAs☆29Updated 5 years ago
- Example designs for the Spartan7 "S7 Mini" FPGA board☆28Updated 6 years ago
- Reusable Verilog 2005 components for FPGA designs☆46Updated 6 months ago
- ☆50Updated 3 years ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆91Updated 7 years ago
- Collection of projects for various FPGA development boards☆45Updated last year