Alternatives and similar repositories for MinecraftHDL

Users that are interested in MinecraftHDL are comparing it to the libraries listed below

• Redcrafter / verilog2factorio
  This project will compile verilog (a hardware description language) into factorio blueprints.
  ☆784Updated 4 months ago
• nickmqb / fpga_craft
  A voxel game/Minecraft clone for the iCE40 UP5K FPGA
  ☆207Updated 3 years ago
• amaranth-lang / amaranth
  A modern hardware definition language and toolchain based on Python
  ☆1,714Updated this week
• T-K-233 / RISC-V-Single-Cycle-CPU
  RISC-V 32bit single-cycle CPUs written in Logisim, Verilog, and Chisel
  ☆437Updated 4 months ago
• rsd-devel / rsd
  RSD: RISC-V Out-of-Order Superscalar Processor
  ☆1,083Updated 3 months ago
• zephray / VerilogBoy
  A Pi emulating a GameBoy sounds cheap. What about an FPGA?
  ☆493Updated 2 years ago
• sylefeb / Silice
  Silice is an easy-to-learn, powerful hardware description language, that simplifies designing hardware algorithms with parallelism and pi…
  ☆1,371Updated 2 weeks ago
• ZipCPU / zipcpu
  A small, light weight, RISC CPU soft core
  ☆1,420Updated 4 months ago
• andrescv / jupiter
  RISC-V Assembler and Runtime Simulator
  ☆430Updated last year
• matslina / awib
  a brainfuck compiler written in brainfuck
  ☆559Updated 4 months ago
• B-Lang-org / bsc
  Bluespec Compiler (BSC)
  ☆1,020Updated last month
• JulianKemmerer / PipelineC
  A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler …
  ☆659Updated this week
• olofk / serv
  SERV - The SErial RISC-V CPU
  ☆1,600Updated 2 weeks ago
• TheThirdOne / rars
  RARS -- RISC-V Assembler and Runtime Simulator
  ☆1,360Updated 11 months ago
• enjoy-digital / litex
  Build your hardware, easily!
  ☆3,373Updated this week
• verilator / verilator
  Verilator open-source SystemVerilog simulator and lint system
  ☆2,946Updated this week
• nickg / nvc
  VHDL compiler and simulator
  ☆704Updated this week
• SpinalHDL / VexRiscv
  A FPGA friendly 32 bit RISC-V CPU implementation
  ☆2,803Updated last week
• YosysHQ / yosys
  Yosys Open SYnthesis Suite
  ☆3,881Updated this week
• VHDL-LS / rust_hdl
  ☆409Updated last month
• cnlohr / avrcraft
  Minecraft server optimized for 8-bit devices.
  ☆462Updated 4 years ago
• steveicarus / iverilog
  Icarus Verilog
  ☆3,071Updated last month
• m-labs / nmigen
  A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen
  ☆672Updated 3 years ago
• Bixilon / Minosoft
  An open source Minecraft reimplementation written from scratch. Mirror of https://gitlab.bixilon.de/bixilon/minosoft
  ☆996Updated 2 weeks ago
• fabianschuiki / llhd
  Low Level Hardware Description — A foundation for building hardware design tools.
  ☆417Updated 3 years ago
• riscv-software-src / riscv-tests
  ☆1,022Updated last week
• rems-project / sail
  Sail architecture definition language
  ☆746Updated this week
• R-O-C-K-E-T / Factorio-SAT
  Enhancing the Factorio experience with SAT solvers
  ☆739Updated 9 months ago
• tilk / digitaljs
  Teaching-focused digital circuit simulator
  ☆708Updated last year
• drom / awesome-hdl
  Hardware Description Languages
  ☆1,038Updated 4 months ago