OpenTitan FI formal verification framework
☆16Aug 29, 2023Updated 2 years ago
Alternatives and similar repositories for synfi
Users that are interested in synfi are comparing it to the libraries listed below
Sorting:
- ☆10Aug 22, 2023Updated 2 years ago
- Side-channel analysis setup for OpenTitan☆37Nov 3, 2025Updated 4 months ago
- ☆54May 13, 2024Updated last year
- CocoAlma is an execution-aware tool for formal verification of masked implementations☆24Sep 26, 2024Updated last year
- A design automation framework to engineer decision diagrams yourself☆25Updated this week
- An Approximate Logic Synthesis Framework based on Boolean Matrix Factorization☆32Nov 13, 2023Updated 2 years ago
- This is a Login application for Android using Parse server.☆10Nov 26, 2018Updated 7 years ago
- System Verilog code describing a fully combinational binarized neural network.☆34Jul 6, 2018Updated 7 years ago
- Proof-of-concept C implementation of AES with masking technique to prevent side-channel analysis attacks☆40Oct 7, 2020Updated 5 years ago
- A copy of the latest version of MVSIS☆12Apr 18, 2021Updated 4 years ago
- A web IDE for ACL2 using a Kubernetes based backend. Evolution of https://github.com/calebegg/proof-pad-classic☆11Jul 15, 2024Updated last year
- An on-chain Turing machine library and interpreter for the NEO VM, i.e. the first universal dApp.☆13Aug 31, 2018Updated 7 years ago
- Analyze experimental data with Programming by Navigation☆17Feb 24, 2026Updated last week
- ELVE : ELVE Logic Visualization Engine☆11Jul 2, 2017Updated 8 years ago
- Strix Claw hang fix for Linux☆10Aug 6, 2025Updated 7 months ago
- Scripts for Digital Design flow control.☆16Oct 30, 2025Updated 4 months ago
- 不定期更新爬取各国网站的爬虫源码☆10Aug 15, 2018Updated 7 years ago
- A simple tool to demonstrate the physical design steps of VLSI Design Flow.☆10Dec 13, 2020Updated 5 years ago
- ☆10Feb 9, 2024Updated 2 years ago
- A fork of Yosys that integrates the CellIFT pass☆13Jul 23, 2025Updated 7 months ago
- An automated toolkit to analyze and detect changes in secure hardware and cryptographic libraries. SCRUTINY provides high-level framework…☆16Feb 12, 2026Updated 3 weeks ago
- easter egg is a flexible, high-performance e-graph library with support of multiple additional assumptions at once☆13Mar 27, 2025Updated 11 months ago
- Synthesiser for Asynchronous Verilog Language☆20Oct 29, 2014Updated 11 years ago
- CaDiCaL + neural glue variable predictions☆10Oct 21, 2020Updated 5 years ago
- Regular Invariant Generator and SMTLIB2 code transformer☆13Aug 8, 2022Updated 3 years ago
- AMD Software Development Kit 2.5 Sources☆10Feb 29, 2016Updated 10 years ago
- Control Logic Synthesis: Drawing the Rest of the OWL☆13Jun 17, 2024Updated last year
- Anatomy of a powerhouse: SystemVerilog TPU based on Google TPU v1☆20Nov 9, 2025Updated 3 months ago
- Tools for manipulating CHC and related files☆15Apr 21, 2023Updated 2 years ago
- A python framework for Optimal Planning Modulo Theories