Alternatives and similar repositories for riscv_em

Users that are interested in riscv_em are comparing it to the libraries listed below

• fmash16 / riscv_emulator
  A basic working RISCV emulator written in C
  ☆69Updated last year
• racerxdl / riscv-online-asm
  RISC-V Online Assembler using Emscripten, Gnu Binutils
  ☆55Updated last year
• jborza / emuriscv
  RISC-V emulator in C
  ☆33Updated 4 years ago
• michaelengel / xv6-d1
  Port of MIT's xv6 OS to the Nezha RISC-V board with Allwinner D1 SoC
  ☆104Updated 2 years ago
• mausimus / rvcc
  Standalone C compiler for RISC-V and ARM
  ☆87Updated last year
• sellicott / tcc-riscv32
  Port TCC (Tiny C Compiler) to support Risc-V 32 targets (specifically for the ESP32-C3). This project is a work-in-progress and is not cu…
  ☆69Updated this week
• twilco / riscv-from-scratch
  The code for the RISC-V from scratch blog post series.
  ☆92Updated 4 years ago
• regymm / quasiSoC
  Linux capable RISC-V SoC designed to be readable and useful.
  ☆149Updated last month
• fernandotcl / TinyEMU
  Tweaks to Fabrice Bellard's TinyEMU
  ☆131Updated last year
• ultraembedded / riscv-linux-boot
  Trivial RISC-V Linux binary bootloader
  ☆50Updated 4 years ago
• regymm / buildroot
  buildroot fork from damien -- RV32 no MMU Linux. Run "make qemu_riscv32_nommu_virt_minimal_defconfig" then "make"
  ☆26Updated last year
• michaelengel / xv6-rv32
  Port of MIT's xv6 OS to 32 bit RISC V
  ☆38Updated 3 years ago
• x653 / xv6-riscv-fpga
  Build a RISC-V computer system on fpga iCE40HX8K-EVB and run UNIX xv6 using only FOSS (free and open source hard- and software).
  ☆52Updated 2 years ago
• michaeljclark / riscv-disassembler
  RISC-V Disassembler with support for RV32/RV64/RV128 IMAFDC
  ☆100Updated 2 years ago
• s094392 / riscv-bare-metal
  A RISC-V bare metal example
  ☆48Updated 3 years ago
• popovicu / linux-no-mmu-userspace-example
  ☆41Updated last year
• splinedrive / lets_build_a_compiler_for_riscv
  A c/RISCV of "Let's Build a Compiler" by Jack Crenshaw
  ☆113Updated 2 years ago
• smunaut / doom_riscv
  Doom classic port to lightweight RISC‑V
  ☆94Updated 2 years ago
• ksco / chibicc-riscv
  A fork of chibicc ported to RISC-V assembly.
  ☆41Updated 3 years ago
• chsasank / ARM7
  Implemetation of pipelined ARM7TDMI processor in Verilog
  ☆90Updated 7 years ago
• grantae / OpenMIPS
  A full implementation of the MIPS32 Release 1 ISA, including virtual memory, TLB, instruction and data caches, interrupts and exceptions,…
  ☆76Updated 6 years ago
• sylefeb / tinygpus
  TinyGPUs, making graphics hardware for 1990s games
  ☆147Updated 3 months ago
• johnwinans / rvalp
  RISC-V Assembly Language Programming
  ☆235Updated 11 months ago
• Ouyancheng / FlatHeadBro
  A baremetal experiment of Allwinner D1, without FEL
  ☆32Updated 2 years ago
• merledu / nucleusrv
  NucleusRV - A 32-bit 5 staged pipelined risc-v core.
  ☆66Updated this week
• lowRISC / muntjac
  64-bit multicore Linux-capable RISC-V processor
  ☆93Updated 2 months ago
• ToNi3141 / RasterIX
  OpenGL 1.x implementation for FPGAs
  ☆92Updated this week
• bigmagic123 / d1-nezha-baremeta
  riscv64 d1-nezha baremeta(Allwinner D1 riscv chip)
  ☆81Updated 3 years ago
• lxp32 / lxp32-cpu
  A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set
  ☆61Updated last month
• riscv / riscv-fast-interrupt
  Proposal for a RISC-V Core-Local Interrupt Controller (CLIC)
  ☆268Updated this week