dag10 / Logisim_CPU
Made a CPU in Logisim when I was 14 (2009), and wrote a naive assembler and compiler for it in Flash. The CPU's design is inspired by Donn Stewart, http://cpuville.com.
☆12Updated 8 years ago
Alternatives and similar repositories for Logisim_CPU:
Users that are interested in Logisim_CPU are comparing it to the libraries listed below
- Design with Logisim a 32-bit two-cycle processor☆9Updated 9 years ago
- 64-bit MISC Architecture CPU☆12Updated 8 years ago
- ☆20Updated 12 years ago
- IP cores for the FPGA Libre project☆12Updated 7 years ago
- FPGA assembler! Create bare-metal FPGA designs without Verilog or VHDL (Not to self: use Lisp next time)☆53Updated 3 years ago
- Logisim CPU.☆31Updated 2 years ago
- A collection of little open source FPGA hobby projects☆48Updated 5 years ago
- AltOr32 - Alternative Lightweight OpenRisc CPU☆12Updated 9 years ago
- RISC-V port of LLVM Linker☆24Updated 6 years ago
- Automatically exported from code.google.com/p/lepton☆27Updated 6 years ago
- LEON2 SPARC CPU IP core LGPL by Gaisler Research☆18Updated 11 years ago
- Git Mirror of Yann Morin's kconfig-frontends project☆19Updated 11 years ago
- A simple jtag programming tool that has been verified on a variety of Xilinx Series7 platforms.☆35Updated 2 years ago
- Designing a 32-bit MIPS CPU in Logisim☆11Updated 13 years ago
- newlib OpenRISC development☆25Updated this week
- YARI is a high performance open source FPGA soft-core RISC implementation, binary compatible with MIPS I. The distribution package includ…☆45Updated 4 months ago
- Tiny CPU is a small 32-bit CPU done mostly as a hobby for educational purposes.☆32Updated 13 years ago
- Verilog VPI VGA Simulator using SDL☆12Updated 10 years ago
- Tools and Examples for IcoBoard☆80Updated 3 years ago
- An executable specification of the RISCV ISA in L3.☆41Updated 6 years ago
- LatticeMico32 soft processor☆105Updated 10 years ago
- A RISC-V SBC based around the LambdaConcept USB2Sniffer FPGA board.☆29Updated 4 years ago
- An online Verilog IDE based on YosysJS.☆24Updated 9 years ago
- Altera Cyclone IV FPGA project for the PCIe LimeSDR board☆38Updated 2 years ago
- OpenFPGA☆33Updated 7 years ago
- Enigma in FPGA☆29Updated 5 years ago
- v8cpu is a simple multi-cycle von Neumann architecture 8-bit CPU in under 500 lines of Verilog.☆13Updated 7 years ago
- A wishbone controlled FM transmitter hack☆21Updated last year
- ReconOS - Operating System for Reconfigurable Hardware☆29Updated 3 years ago
- System on Chip SPARC V8 using leon3 CPU by Gaisler. C++, vhdl, v files.☆11Updated 12 years ago