Introductory course to Self Timed Circuits
☆12Sep 20, 2025Updated last year
Alternatives and similar repositories for course-self-timed-circuits
Users that are interested in course-self-timed-circuits are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Software and resources to help Purdue students (and others) continue developing with SystemVerilog after losing access to proprietary too…☆17Jun 13, 2021Updated 5 years ago
- design and verification of asynchronous circuits☆52Updated this week
- Example of how to get started with olofk/fusesoc.☆20Jul 25, 2021Updated 5 years ago
- ☆15Jan 30, 2013Updated 13 years ago
- A guide on how to package HDL code (VHDL or Verilog) for PYNQ environments☆11Aug 14, 2025Updated last year
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- A terminal client for linux. powered with python.☆17Feb 20, 2021Updated 5 years ago
- Dual-Core Out-of-Order MIPS CPU Design☆26May 8, 2025Updated last year
- A library to parse BLIF (Berkeley Logic Interchange Format) files.☆10Mar 11, 2015Updated 11 years ago
- Public Lab Documents for ECE 36200☆34Apr 16, 2026Updated 6 months ago
- Precision Waveform Generator FeatherWing☆15Oct 12, 2022Updated 4 years ago
- Design files for my keyboards☆22Sep 27, 2026Updated 3 weeks ago
- Dockerfile for AMD/Xilinx Vivado☆16Mar 22, 2026Updated 7 months ago
- midi-controlled synth example for STM32F407VG Discovery board☆14Jul 28, 2021Updated 5 years ago
- Evolvable Hardware: Begin using the BitstreamEvolution Open Source Toolkit☆19May 28, 2026Updated 4 months ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- 2-core MIPS R10K OoO Processor with Snooping MSI and Pipeline Bus☆14Jan 5, 2018Updated 8 years ago
- Simulated Annealing for MAX-CUT problems on {+1,-1}-weighted complete graphs☆12Feb 2, 2019Updated 7 years ago
- This is a probabilistic SAT attack tool.☆13Jun 5, 2021Updated 5 years ago
- A Rust Hardware Abstraction Layer for the MAX78000 microcontroller☆12Feb 27, 2025Updated last year
- ACT hardware description language and core tools.☆131Updated this week
- ☆16Jul 1, 2026Updated 3 months ago
- This is the repository containing the implementation of sparse dense matrix multiplication for the matrix dimension of 560 x 560.☆10Jul 7, 2021Updated 5 years ago
- gdb python scripts for SystemC design introspection and tracing☆32Mar 24, 2019Updated 7 years ago
- SMT Attack☆23Mar 5, 2021Updated 5 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- ☆13Apr 15, 2025Updated last year
- CTF problems for the practice of Beginners in Cyber Forensics.☆40Feb 14, 2026Updated 8 months ago
- CNN simd based accelerator using Vitis HLS☆12Jul 15, 2022Updated 4 years ago
- Basic loadout for SQRL Acorn CLE 215/215+ board. Blinks all LEDs, outputs square waves on all 12 GPIO outputs☆70Nov 21, 2021Updated 4 years ago
- ☆32Mar 26, 2026Updated 6 months ago
- A second order optimizer for TensorFlow that uses the Saddle-Free method.☆22Feb 4, 2019Updated 7 years ago
- Implementation of ray-tracing in Godot engine, via compute shaders. Focus on realtime performance and optimization.☆21Sep 5, 2023Updated 3 years ago
- (Verilog) A simple convolution layer implementation with systolic array structure☆14May 9, 2022Updated 4 years ago
- ☆23Sep 28, 2026Updated 3 weeks ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Instance segmentation of center pivot irrigation system in Brazil using Landsat images and Convolutional Neural Network☆11May 27, 2024Updated 2 years ago
- RISC-V-based many-core neuromorphic architecture☆18Updated this week
- This is a 4*5 PE array for LeNet accelerator based on FPGA.☆13Jul 20, 2022Updated 4 years ago
- Math Homework Generator generates new random print-friendly homework worksheets for math practice. The randomness allows for variation an…☆30Dec 27, 2022Updated 3 years ago
- ☆22Jun 19, 2024Updated 2 years ago
- Accelerate multihead attention transformer model using HLS for FPGA☆13Dec 7, 2023Updated 2 years ago
- dUltra: Ultra-Fast Diffusion Large Language Models via Reinforcement Learning☆18Jul 11, 2026Updated 3 months ago