antmicro / kintex-410t-devboard
☆35Updated 4 months ago
Alternatives and similar repositories for kintex-410t-devboard:
Users that are interested in kintex-410t-devboard are comparing it to the libraries listed below
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆62Updated this week
- Small footprint and configurable JESD204B core☆41Updated last month
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆84Updated 6 years ago
- Basic USB 1.1 Host Controller for small FPGAs☆88Updated 4 years ago
- Wishbone controlled I2C controllers☆45Updated 3 months ago
- ☆44Updated 2 years ago
- Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7☆65Updated 7 months ago
- Contains VHDL IP-blocks to create stand-alone RapidIO-endpoints, RapidIO-switches and RapidIO-switches with local endpoints.☆34Updated 7 years ago
- Small footprint and configurable Inter-Chip communication cores☆55Updated last month
- Experimental Xilinx Artix-7 driven Data Center Security Communication Module☆48Updated last year
- A demonstration showing how several components can be compsed to build a simulated spectrogram☆41Updated 10 months ago
- Projects published on controlpaths.com and hackster.io☆40Updated 2 years ago
- USB Full Speed PHY☆39Updated 4 years ago
- SoC based on SERV, Olof Kindgren's bit-serial RISC-V processor. Provides Execute in Place (XiP) from Flash.☆29Updated 4 years ago
- 🔌 Compact JTAG ("cJTAG") to 4-wire JTAG (IEEE 1149.1) bridge.☆23Updated 3 years ago
- Extensible FPGA control platform☆57Updated last year
- Programmer for the Lattice ECP5 series, making use of FTDI based adaptors☆87Updated 3 months ago
- ☆14Updated 2 months ago
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆87Updated 5 months ago
- Experimental flows using nextpnr for Xilinx devices☆41Updated 2 weeks ago
- Time to Digital Converter (TDC)☆30Updated 4 years ago
- Nitro USB FPGA core☆84Updated 11 months ago
- Using VexRiscv without installing Scala☆37Updated 3 years ago
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆61Updated 6 years ago
- Fully featured implementation of Inter-IC (I2C) bus master for FPGAs☆26Updated 4 years ago
- PicoRV☆44Updated 4 years ago
- Small footprint and configurable SPI core☆41Updated last month
- Verilog Modules for DSP functions and other common tasks to make FPGA development easier and more fun.☆20Updated 9 years ago
- Featherweight RISC-V implementation☆52Updated 3 years ago
- Reusable Verilog 2005 components for FPGA designs☆40Updated last year