andrade824 / Pulse-Width-Modulation-IP
A PWM Module IP core written in Verilog, along with a firmware driver (developed for the Zynq-7000 Programmable SoC)
☆16Updated 10 years ago
Alternatives and similar repositories for Pulse-Width-Modulation-IP:
Users that are interested in Pulse-Width-Modulation-IP are comparing it to the libraries listed below
- 基于Xilinx Zynq 嵌入式软硬件协同设计实战指南☆83Updated 9 years ago
- ☆24Updated 9 years ago
- AD7606 driver verilog☆39Updated 5 years ago
- This is a wiki and code sharing for ZYNQ☆71Updated 8 years ago
- Repository for Xilinx PCIe DMA drivers☆42Updated 7 years ago
- minimal code to access ps DDR from PL☆19Updated 5 years ago
- Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks☆64Updated 4 months ago
- Test SRIO connection between FPGA (Kintex-7) and DSP (C6678)☆17Updated 7 years ago
- Demonstration of the AXI DMA engine on the ZedBoard☆52Updated 4 years ago
- 基于arm cortex-m0内核的xillinx fpga sopc工程项目☆12Updated 5 years ago
- Light-weight RISC-V RV32IMC microcontroller core.☆104Updated 8 years ago
- ☆27Updated 8 years ago
- mirror of https://git.elphel.com/Elphel/x393_sata☆33Updated 4 years ago
- DMA enabled Zynq PS-PL communication to implement high throughput data transfer between Linux applications and user IP core.☆39Updated 8 years ago
- Controller for i2c EEPROM chip in Verilog for Mojo FPGA board☆25Updated 9 years ago
- Xilinx Soft-IP HDMI Rx/Tx core Linux drivers☆39Updated 4 months ago
- Open source zynq platform☆18Updated 6 years ago
- Example design for the Ethernet FMC using the hard GEMs of the Zynq☆54Updated 4 months ago
- 本信号处理板主要由FPGA芯片和CYUSB3.0 芯片组成,其中FPGA模块主要完成与相关外设的交互,CYUSB3.0主要完成协议数据的传输。 2.2.1 FPGA模块 处理流程: 1. 链路初始化: 在上位机完成USB固件的下载,并读取…☆25Updated 9 years ago
- ☆56Updated 2 years ago
- ☆18Updated 4 years ago
- Linux Driver for the Zynq FPGA DMA engine☆87Updated 10 years ago
- ☆14Updated 3 years ago
- turbo 8051☆29Updated 7 years ago
- MIPI CSI-2 Camera Sensor Receiver V2 Verilog HDL implementation For any generic FPGA. Tested with IMX219 IMX477 on Lattice Crosslink NX w…☆52Updated last month
- Simple C snippet to transfer DMA memory with scatter/gather on a Zynq 7020☆54Updated 7 years ago
- Ethernet MAC IP Core for 100G/50G/40G/25G/10Gbps☆42Updated last year
- 通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结☆22Updated 5 years ago
- RTL for mipi serialize and deserialize☆11Updated 7 years ago
- ☆18Updated 7 years ago