☆24Sep 23, 2015Updated 10 years ago
Alternatives and similar repositories for zynq_examples
Users that are interested in zynq_examples are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Linux Driver for the Zynq FPGA DMA engine☆90Feb 12, 2015Updated 11 years ago
- Hardware, Linux Driver and Library for the Zynq AXI DMA interface☆105Jul 21, 2018Updated 8 years ago
- This project implemented an unoptimized simple convolutional neural network in ZYNQ's PL and realized data transmission through axidma dr…☆12Aug 5, 2018Updated 8 years ago
- a playground for xilinx zynq fpga experiments☆50Nov 19, 2018Updated 7 years ago
- Universal Advanced JTAG Debug Interface☆17May 10, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- A PWM Module IP core written in Verilog, along with a firmware driver (developed for the Zynq-7000 Programmable SoC)☆18Nov 3, 2014Updated 11 years ago
- Fork of linux-stable.git with my patches for zynq-based boards (Zed, Z-Turn MYIR..)☆16Jul 4, 2019Updated 7 years ago
- FPGA SDR platform: AD9963 + XC6SLX9 + CY7C68013☆18Jan 4, 2014Updated 12 years ago
- fpga for utrasound mobile device☆13Aug 10, 2015Updated 11 years ago
- MATLAB-based FIR filter and profile designer☆10Jan 25, 2017Updated 9 years ago
- Upstream eglibc + xilinx branches☆19Nov 7, 2013Updated 12 years ago
- ☆26Oct 8, 2019Updated 6 years ago
- An attempt to synthesize GPS signals in FPGA logic.☆19Feb 17, 2026Updated 6 months ago
- Simple AMP Running Linux and Bare-Metal System on Both Zynq SoC Processors☆23Dec 17, 2015Updated 10 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Example design for the Ethernet FMC using the hard GEMs of the Zynq☆61Jul 8, 2026Updated last month
- A complete Linux project for the ZYBO. This project helps me during my first steps with embedded Linux. You can find anything necessary t…☆13Oct 8, 2020Updated 5 years ago
- Open Source ZYNQ Board☆31Aug 19, 2015Updated 11 years ago
- (RETIRED see https://github.com/analogdevicesinc/hdl instead) FPGA interface reference designs for Analog Devices mixed signal IC product…☆93Sep 12, 2018Updated 7 years ago
- This is a wiki and code sharing for ZYNQ☆74Apr 2, 2016Updated 10 years ago
- SystemVerilog Design Patterns☆26Mar 11, 2015Updated 11 years ago
- ☆19Jun 30, 2015Updated 11 years ago
- ☆22Feb 2, 2023Updated 3 years ago
- 基于Xilinx Zynq 嵌入式软硬件协同设计实战指南☆87Aug 25, 2015Updated 11 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Constrained RAndom Verification Enviroment (CRAVE)☆20Aug 26, 2026Updated last week
- minimal code to access ps DDR from PL☆23Oct 18, 2019Updated 6 years ago
- rk-document☆24Jul 22, 2021Updated 5 years ago
- 一个用于在protobuf格式与可见的json、xml、text等格式之间进行格式转换的库☆10Nov 7, 2017Updated 8 years ago
- 这是一个利用Spring Cloud，Dubbo，Thrift三个微服务框架整合开发的IM社交系统,并用到了Netty即时通讯技术，Tensorflow深度学习框架与Haar+Adaboost人脸识别技术，每个模块都可以被完整的被拿来直接使用，适合对微服务，即时通信感兴趣的…☆11Nov 16, 2022Updated 3 years ago
- Lenet for MNIST handwritten digit recognition using Vivado hls tool☆38Jul 22, 2020Updated 6 years ago
- Additional Stuff for Qt Quick Controls 2, to make it work event better☆14Oct 7, 2017Updated 8 years ago
- Runs NanoVG demo with moui.☆14Aug 10, 2020Updated 6 years ago
- Advanced Encryption Standard (AES) SystemVerilog Core☆36Jan 2, 2018Updated 8 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- ☆14Feb 7, 2020Updated 6 years ago
- How to create a bitbake recipe for a ROS package and cross-compile it.☆11Jul 24, 2013Updated 13 years ago
- Plot real-time gps reading on world vector shoreline map☆13Mar 10, 2014Updated 12 years ago
- The Demo that was presented at FCCM.☆16Aug 16, 2018Updated 8 years ago
- DMA source and sink blocks for Xilinx Zynq FPGAs☆24May 19, 2020Updated 6 years ago
- APT34/OILRIG leak☆11Jun 25, 2019Updated 7 years ago
- Benchmarking Analysis of Vision Kernels on Embedded CPU, GPU and FPGA☆16Apr 21, 2019Updated 7 years ago