Alternatives and similar repositories for Embedded-Design-Tutorials:

Users that are interested in Embedded-Design-Tutorials are comparing it to the libraries listed below

• Xilinx / Vivado-Design-Tutorials
  ☆179Updated last month
• Xilinx-Wiki-Projects / ZCU102-Ethernet
  Ethernet Example Projects targeting the Xilinx ZCU102 evaluation board. This repository replaces XAPP1305.
  ☆61Updated last week
• Xilinx / XilinxBoardStore
  ☆274Updated 2 weeks ago
• ATaylorCEngFIET / Hackster
  Files used with hackster examples
  ☆144Updated 4 years ago
• Xilinx-Wiki-Projects / software-prototypes
  ☆66Updated 7 months ago
• Avnet / bdf
  Avnet Board Definition Files
  ☆131Updated last month
• alexforencich / verilog-dsp
  Verilog digital signal processing components
  ☆129Updated 2 years ago
• fpgadeveloper / ethernet-fmc-axi-eth
  Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks
  ☆63Updated 3 months ago
• xupgit / Zynq-Design-using-Vivado
  This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.
  ☆84Updated last year
• NXP / i3c-slave-design
  MIPI I3C Basic v1.0 communication Slave source code in Verilog with BSD license to support use in sensors and other devices.
  ☆122Updated 4 years ago
• Xilinx / Vitis_Model_Composer
  Vitis Model Composer Examples and Tutorials
  ☆87Updated this week
• Avnet / Ultra96-PYNQ
  Board files to build Ultra 96 PYNQ image
  ☆154Updated 2 months ago
• gtaylormb / ultra96v2_imx219_to_displayport
  Raspberry Pi v2 camera (IMX219) to DisplayPort of Ultra96-V2 board through PL
  ☆69Updated 3 years ago
• OVGN / OpenHBMC
  Open-source high performance AXI4-based HyperRAM memory controller
  ☆69Updated 2 years ago
• freecores / verilog_fixed_point_math_library
  Fixed Point Math Library for Verilog
  ☆124Updated 10 years ago
• xupgit / FPGA-Design-Flow-using-Vivado
  This course gives an introduction to digital design tool flow in Xilinx programmable devices using Vivado® Design software suite
  ☆102Updated 5 years ago
• Avnet / hdl
  ☆108Updated last month
• jamieiles / uart
  Verilog UART
  ☆141Updated 11 years ago
• ahmedshahein / DSP-RTL-Lib
  RTL Verilog library for various DSP modules
  ☆85Updated 3 years ago
• fpgadeveloper / fpga-drive-aximm-pcie
  Example designs for FPGA Drive FMC
  ☆235Updated last month
• missinglinkelectronics / fpga-vbs
  Vivado build system
  ☆66Updated 2 months ago
• ultraembedded / riscv_soc
  Basic RISC-V Test SoC
  ☆112Updated 5 years ago
• ATaylorCEngFIET / Mastering-MicroBlaze
  Slides and lab instructions for the mastering MicroBlaze session
  ☆34Updated 2 years ago
• fpgadeveloper / zedboard-axi-dma
  Demonstration of the AXI DMA engine on the ZedBoard
  ☆52Updated 4 years ago
• Digilent / digilent-vivado-scripts
  ☆66Updated 7 months ago
• HDLForBeginners / Examples
  ☆87Updated last year
• pulp-platform / pulp-sdk
  ☆105Updated last month
• fpgadeveloper / ethernet-fmc-zynq-gem
  Example design for the Ethernet FMC using the hard GEMs of the Zynq
  ☆54Updated 3 months ago
• nandland / spi-slave
  SPI Slave for FPGA in Verilog and VHDL
  ☆194Updated 9 months ago
• cathalmccabe / PYNQ_tutorials
  ☆79Updated last year